Embedded voltage controlled oscillator with minimum sensitivity

Details Embedded voltage controlled oscillator with minimum sensitivity Embedded voltage controlled oscillator with minimum sensitivity

1996-12-12

1998-12-08

Mis, David

Oscillators

Ring oscillators

331 34, 331175, 331177R, H03B 504, H03B 524

Patent

active

058476164

ABSTRACT:
The present invention provides a voltage controlled oscillator with improved noise immunity and minimized variation due to manufacturing process, power supply and operating temperature changes. The voltage controlled oscillator consists of fully differential connected ring oscillator that includes a plurality of differentially connected delay elements. The ring oscillator responds to a control current signal for controlling the frequency of oscillation. A voltage to current converter converts the input tuning voltage to an output current for the controlling of the ring oscillator. The delay element consists of two source coupled P-channel transistors connected to a current source. The drains of the P-channel transistors are each connected to a voltage controlled impedance that changes the delay characteristics of the delay element in response to the input tuning voltage. A voltage reference generator provides the reference voltage necessary to determine the amplitude out of the delay element and is insensitive to variations due to manufacturing process, power supply, and operating temperature. A fully differential comparator provides symmetrical loading for the ring oscillator and the high gain necessary to provide the output drive capability.

REFERENCES:
patent: 5061907 (1991-10-01), Rasmussen
patent: 5412349 (1995-05-01), Young et al.
patent: 5440277 (1995-08-01), Ewen et al.
patent: 5523723 (1996-06-01), Arcus et al.
patent: 5581216 (1996-12-01), Ruetz
patent: 5686867 (1997-11-01), Sutardja et al.
Yang et al. "A PLL Clock Generator with Sto 110 Mhz of Lock Range for Microprocessors", IEEE Journal of Solid State Circuits, vol. 27, Nov. 11, 1992 pp.1599-1607.

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