Static information storage and retrieval – Interconnection arrangements – Transistors or diodes
Reexamination Certificate
2005-09-20
2005-09-20
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
Transistors or diodes
C365S063000, C365S051000, C365S190000, C365S208000, C365S207000, C365S230030
Reexamination Certificate
active
06947308
ABSTRACT:
The object of the invention is the provision of a semiconductor memory having processor and memory integrally mounted on one chip. To attain the object, crossbar wirings are laid on the memory cell area and crossbar switches are disposed in the sense amplifier area or word driver area. Accordingly, memory sharing is made possible without increasing the chip area and it is also made possible to take out a large number of data continuously. Hence, a memory-embedded system with a high bandwidth can be provided.
REFERENCES:
patent: 5379248 (1995-01-01), Wada et al.
patent: 5590084 (1996-12-01), Miyano et al.
patent: 5715202 (1998-02-01), Harima
patent: 5943253 (1999-08-01), Matsumiya et al.
patent: 6175516 (2001-01-01), Kitsukawa et al.
patent: 0 935 252 (1999-08-01), None
patent: 8-255484 (1996-10-01), None
patent: 10-289581 (1998-10-01), None
Horikawa Jun
Murai Katsumi
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