Embedded logic analyzer functionality for system level...

Data processing: structural design – modeling – simulation – and em – Emulation – In-circuit emulator

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07991606

ABSTRACT:
An electronic design automation system merges embedded logic analyzer technology with system level design and analysis technology. Embedded logic analyzers provide hardware to allow board-level signal capture and subsequent analysis of test devices programmed with a hardware design generated using electronic design automation. System level environments provide interactive tools for entering, modeling, simulating and analyzing multi-domain systems such as DSP designs. Typically, a user enters a system level design as a block diagram, including embedded logic analyzer blocks. The user inserts such blocks at nodes in the design where he or she wishes to capture signals to verify the design.

REFERENCES:
patent: 4495599 (1985-01-01), Haag et al.
patent: 5204829 (1993-04-01), Lyu et al.
patent: 5282213 (1994-01-01), Leigh et al.
patent: 5452239 (1995-09-01), Dai et al.
patent: 5544067 (1996-08-01), Rostoker et al.
patent: 5726902 (1998-03-01), Mahmood et al.
patent: 5848262 (1998-12-01), Burch
patent: 6026226 (2000-02-01), Heile et al.
patent: 6053947 (2000-04-01), Parson
patent: 6067650 (2000-05-01), Beausang et al.
patent: 6086624 (2000-07-01), Murata
patent: 6110223 (2000-08-01), Southgate et al.
patent: 6152612 (2000-11-01), Liao et al.
patent: 6182247 (2001-01-01), Herrmann et al.
patent: 6247147 (2001-06-01), Beenstra et al.
patent: 6247165 (2001-06-01), Wohl et al.
patent: 6286114 (2001-09-01), Veenstra et al.
patent: 6317860 (2001-11-01), Heile
patent: 6389558 (2002-05-01), Herrmann et al.
patent: 6425116 (2002-07-01), Duboc et al.
patent: 6460148 (2002-10-01), Veenstra et al.
patent: 6530073 (2003-03-01), Morgan
patent: 6539536 (2003-03-01), Singh et al.
patent: 6588004 (2003-07-01), Southgate et al.
patent: 6588006 (2003-07-01), Watkins
patent: 6606532 (2003-08-01), Yasuura et al.
patent: 6606588 (2003-08-01), Schaumont et al.
patent: 6618839 (2003-09-01), Beardslee et al.
patent: 6687662 (2004-02-01), McNamara et al.
patent: 6760898 (2004-07-01), Sanchez et al.
patent: 6823497 (2004-11-01), Schubert et al.
patent: 6842888 (2005-01-01), Roberts
patent: 6862563 (2005-03-01), Hakewill et al.
patent: 6883147 (2005-04-01), Ballagh et al.
patent: 7020854 (2006-03-01), Killian et al.
patent: 7085702 (2006-08-01), Hwang et al.
patent: 7107567 (2006-09-01), LeBlanc
patent: 7110935 (2006-09-01), Hwang et al.
patent: 2002/0049944 (2002-04-01), Lagoon et al.
patent: 2002/0194543 (2002-12-01), Veenstra et al.
patent: 2003/0033374 (2003-02-01), Horn et al.
patent: 2003/0088710 (2003-05-01), Sandhu et al.
patent: 2003/0125925 (2003-07-01), Walther et al.
patent: 2003/0154465 (2003-08-01), Bollano et al.
patent: 2003/0200522 (2003-10-01), Roberts
patent: 2003/0204388 (2003-10-01), Rodriguez et al.
patent: 2005/0065990 (2005-03-01), Allen
patent: 2005/0166038 (2005-07-01), Wang et al.
patent: 2006/0117274 (2006-06-01), Tseng et al.
The Authoritative Dictionary of IEEE Standards Terms, 7th Ed. © 2000. p. 915.
Ha, Dong. “Simulation Graphical Environment User's Guide Using the VHDL Interface.” Last Updated Oct. 1, 1998. http://www.ee.vt.edu/˜ha/cadtools/synopsys/sge—tutorial/tutorial.html.
“Synopsys® SourceModel User's Manual for VHDL.” Apr. 1999. pp. 1-15 and 95-106.
“Dong S. Ha, Professor.” Printed Jun. 15, 2006. http://www.ee.vt.edu/ha.
Xilinx®. “ChipScope Pro Software and Cores User Manual.” Apr. 10, 2002.
“Simulink: Dynamic System Simulation for MATLAB®.” Version 3. Jan. 1999.
“Formal Verification Flow for Xilinx Devices Using the Synplify Pro® Software and the Conformal™ LEC Tool.” Mar. 2003. http://www.synplicity.com/literature/pdf/formal—verification—final.pdf.
Paul Graham et al., “Instrumenting Bitstreams for Debugging FPGA Circuits”, 2001, Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, ten unnumbered pages.
Altera, “SignalTap Embedded Logic Analyzer Megafunction”, Apr. 2001, Altera, pp. 1-8.
Description of DSP design from the MathWorks website (www.mathworks.com/products/dsp-comm/topdown.shtml); available prior to May 31, 2002.
Description of Xilinx System Generator for Simulink; Product and Description available prior to May 31, 2002.
Description of DSP Builder product available from Altera Corporation; description appears at www.altera.com/products/software/system/dsp/dsp-builder.html; available prior to May 31, 2002.
Altera DSP Builder User Guide; available prior to May 31, 2002.
Simulink Fixed-Point Blockset, User's Guide, Version 3; Product and Description available prior to May 31, 2002.
Molson et al., “Bit Accurate Hardware Simulation in System Level Simulators,” U.S. Appl. No. 10/160,142, filed May 31, 2002, 49 Pages.
Fairman et al., “Gaining Access To Internal Nodes In a PLD,” U.S. Appl. No. 09/802,480, filed Mar. 9, 2001, 31 Pages.
Nixon et al., “Chip Debugging Using Incremental Recompilation,” U.S. Appl. No. 10/351,017, filed Jan. 24, 2003, 41 Pages.
Rally et al., “PLD Debugging Hub,” U.S. Appl. No. 10/295,265, filed Nov. 14, 2002, 37 Pages.
Chin, “Implementing DSP Designs with the Xilinx System Generator and Implementation Tools,” Jun. 2001, Syndicated, vol. 1, Issue 2, pp. 1-2.
Holmberg et al, “The MathWorks and Xilinx take FPGAs into Mainstream DSP,” New Technologies DSP, Feb. 2001, pp. 14-15.
Kreiner et al., A Novel Codesign Approach based on Distributed Virtual Machines, Institute for Technical Informatics, Mar. 2002.
Mahlke et al., “Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators,” 5thInternational Workshop on Software and Compilers for Embedded Systems, Mar. 2001 IEEE, total pages of 43.
Vink, “Programming DSPs using C: efficiency and portability trade-offs,” Embedded Systems, May 2000, pp. 19-30.
Simulink Fixed-Point Blockset, User's Guide, Version 3; Product and Description available prior to May 31, 2002.
Office Action dated Aug. 24, 2006; U.S. Appl. No. 10/458,516.
Office Action dated Mar. 3, 2006; U.S. Appl. No. 10/458,516.
S. Mahlke, R. Ravindran, M. Schlansker, R. Schreiber, and T. Sherwood, “Bitwidth Cognizant Architecture Synthesis of Custom Hardware Accelerators”, herein referred as Sherwood, 5thInternational Workshop on Software and Compilers for Embedded Systems, Mar. 2001 IEEE, total pages of 43.
Per Holmberg, and Anne Mascarin, “The Meth Works and Xilnx take FPGAs into Mainstream DSP”, New Techologies DSP, Feb. 2001, pp. 14-15.
Christian Kreiner, Christian Steger, Egon Teiniker, and Reinhold Weiss, “A Novel Codesign Approach based on Distributed Virtual Machines”, Institute for Technical Informatics, Mar. 2002.
Darin Chin, “Implementing DSP Designs with the Xilnx System Generator and Implementation Tools”, Jun. 2001, Syndicated, vol. 1, Issue 2, pp. 1-2.
Xilnx® “ChipScope Pro Software and Cores User Manual”, Apr. 10, 2002.
“Simulink: Dynamic System Simulation for MATLAB®” Verson 3. Jan. 1999.
“Formal Verification Flow for Xilinx Devices Using the Synplify Pro® Software and the Conformal™ LEC Tool”, Mar. 2003. http://www.synplicity.com/literature/pdf/formal—verificat4ion—final.pdf.
U.S. Office Action dated Nov. 21, 2007 issued in U.S. Appl. No. 10/458,516.
U.S. Office Action dated Sep. 26, 2007, issued in U.S. Appl. No. 10/458,516.
U.S. Office Action dated Nov. 11, 2007, from U.S. Appl. No. 10/458,519.
U.S. Office Action dated Sep. 26, 2007, from U.S. Appl. No. 10/458,519.
Xilinx System Generator for DSP, User Guide, Version 3.1, printed on Jun. 18, 2007, 236 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Embedded logic analyzer functionality for system level... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Embedded logic analyzer functionality for system level..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Embedded logic analyzer functionality for system level... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2644541

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.