Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1998-08-21
2000-10-31
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Plural blocks or banks
36523006, 365 52, 365 63, G11C 800
Patent
active
061412864
ABSTRACT:
A DRAM architecture configures memory cells into a predetermined number of arrays. Each array has its own row decoders and sense amplifiers. A data path circuit containing local drivers and data read and write lines is associated with each of the arrays in a first direction. The respective connections between the array and data path circuit utilize IO lines that are considerably shorter than the IO lines used in prior art architectures. Using this unique arrangement of data path circuits and memory arrays as a building block, a DRAM architecture of increased capacity can be constructed by simply placing additional data paths and memory arrays on to the semiconductor device in a second direction orthogonal to the first direction.
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Bunker Layne G.
Merritt Todd A.
Vo Huy T.
Micro)n Technology, Inc.
Nguyen Tan T.
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