Patent
1974-09-24
1976-05-18
Shoop, William M.
321 11, H02M 3335
Patent
active
039581691
ABSTRACT:
A power supply system for use in conjunction with digital systems and particularly adapted to avoid impairment of digital system performance by power supply generated noise. The clock frequency of the digital system is monitored, divided and then applied to control the switching frequency of a D.C. to D.C. power converter. The converter thus switches at a synchronized submultiple of the digital clock frequency such that switching transients are confined to transition times within the digital system.
REFERENCES:
patent: 3461405 (1969-08-01), Bishop et al.
patent: 3551777 (1970-12-01), Bingley
patent: 3629725 (1971-12-01), Chun
patent: 3750383 (1973-08-01), Kakizawa
patent: 3794907 (1974-02-01), Fucito
patent: 3818484 (1974-06-01), Nakamura et al.
patent: 3842589 (1974-10-01), Luce et al.
Burroughs Corporation
Gaybrick Robert J.
Penn William B.
Shoop William M.
Ubell Franklin D.
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