Elevated voltage level I.sub.DDQ failure testing of integrated c

Details Elevated voltage level I.sub.DDQ failure testing of integrated c Elevated voltage level I.sub.DDQ failure testing of integrated c

1994-09-09

1996-05-21

Karlsen, Ernest F.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

324537, G01R 3126

Patent

active

055193331

ABSTRACT:
Burn in testing of static CMOS IC's is eliminated by I.sub.DDQ testing at elevated voltage levels. These voltage levels are at least 25% higher than the normal operating voltage for the IC but are below voltage levels that would cause damage to the chip.

REFERENCES:
patent: 5025344 (1991-06-01), Maly et al.
patent: 5057774 (1991-10-01), Verhelst et al.
patent: 5332973 (1994-07-01), Brown et al.

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