Elevated temperature gallium arsenide field effect transistor wi

Details Elevated temperature gallium arsenide field effect transistor wi Elevated temperature gallium arsenide field effect transistor wi

1995-04-07

1997-01-14

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257 12, 257183, 257196, H01L 310256, H01L 2920

Patent

active

055942628

ABSTRACT:
The incorporation of an aluminum arsenide (AlAs) buffer layer in a gallium arsenide (GaAs) field effect transistor (FET) structure is found to improve the overall device performance, particularly in the high temperature operating regime. Similar characteristics may be obtained from devices fabricated with an Al.sub.x Ga.sub.1-x As 0.2.ltoreq.x.ltoreq.1 barrier layer. At temperatures greater than 250.degree. C., the semi-insulating gallium arsenide substrate begins to conduct significant amounts of current. The highly resistive AlAs buffer layer limits this increased conduction, thus permitting device operation at temperatures where parasitic leakage currents would impede or prevent device operation. Devices fabricated with AlAs buffer layers exhibited lower drain parasitic leakage currents and showed improved output conductance characteristics at 350.degree. C. ambient temperature. The buffer layer will also improve the backgating problems which are detrimental to the operation of monolithic GaAs digital circuits having closely spaced devices under different bias conditions. An additional benefit of the high temperature capabilities of these devices is an improved reliability at conventional operating temperatures. Devices fabricated with this technology have shown an order of magnitude improvement in switching characteristics over known and published results.

REFERENCES:
patent: 4918493 (1990-04-01), Geissberger et al.
patent: 4952527 (1990-08-01), Calawa et al.
patent: 5170228 (1992-12-01), Sasaki
Greenberg et al., "A Pseudomorphic Al GaAsIn.sup.+ -InGaAs Metal-Insulator-Doped Channel FET for Broad-Band, Large-Signal Applications," IEEE Electronics Device Letters, vol. 12, No. 8, Aug. 1991, pp. 436-438.
Swirhon et al., "Refractory Self-Aligned-Gate GaAs FET Based Circuit Technology for High Ambient Temperature," Proceedings at First International High Temperature Electronics Conference, 1991, pp. 295-300.

Affiliated with

Also associated with

Rating

Elevated temperature gallium arsenide field effect transistor wi does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Elevated temperature gallium arsenide field effect transistor wi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Elevated temperature gallium arsenide field effect transistor wi will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1390250