Electrical pulse counters – pulse dividers – or shift registers: c – Starting – stopping – presetting or resetting the counter – Counter chains with a radix or base other than the number...
Patent
1987-03-03
1989-03-21
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Starting, stopping, presetting or resetting the counter
Counter chains with a radix or base other than the number...
377111, 377116, H03K 2342, H03K 2348
Patent
active
048151149
ABSTRACT:
A stable binary counter as applicable to synchronous counters, to frequency dividers and more particularly to microwave integrated circuits is constituted by a plurality of elementary counters mounted in cascade. Each elementary counter is formed by a half-adder having two inputs, one "sum" output and one "carry" output. The "sum" output is connected to the input of a master-slave flip-flop, the output of which is connected in a feedback loop to one input of the half-adder. The master and slave flip-flops are controlled by the two complementary waveforms of a single clock signal. The "carry" output of one half-adder is connected to the input of the following half-adder.
REFERENCES:
patent: 3354295 (1967-11-01), Kulka
patent: 4037085 (1977-07-01), Minorikawa
patent: 4637038 (1987-01-01), Boyle
patent: 4656649 (1987-04-01), Takahashi
patent: 4669101 (1987-05-01), McCombs
"Thomson-CSF"
Heyman John S.
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