Electricity: electrical systems and devices – Safety and protection of systems and devices – Transient responsive
Reexamination Certificate
2000-05-23
2003-01-28
Jackson, Stephen W. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Transient responsive
C361S054000
Reexamination Certificate
active
06512663
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an electrostatic protection device and an electrostatic protection circuit used to prevent breakdown caused by static electricity.
In general, a semiconductor device is readily broken by static electricity. To this end, various protection devices (or elements) and a protection circuit including these protection devices are provided between an input/output pad connected to an external circuit and an internal circuit.
In particular, a gate insulating film of a MOS device is readily broken by the static electricity. Consequently, when excessive charges having a voltage higher than an operation voltage are generated by electrostatic discharge from the input/output pad in a MOS circuit, the excessive charges must be rapidly discharged to a ground before the operation voltage reaches a breakdown voltage of the gate insulating film in an internal CMOS circuit.
Under this circumstance, the static electricity can be easily discharged by forward characteristics of an n+p diode when a negative electrostatic discharge is applied to the input/output pad of the CMOS circuit.
However, when a positive electrostatic discharge is applied thereto, it is difficult to protect the gate insulating film by the use of the n+p diode.
Therefore, a parasitic bipolar transistor or a parasitic thyrister is generally and conventionally used as an effective electrostatic protection device.
Referring to
FIGS. 1A and 1B
, description will be made about a first related electrostatic protection circuit.
The first related electrostatic protection circuit uses a parasitic bipolar transistor, and a gate electrode G is grounded, as illustrated in FIG.
1
A.
The first protection circuit can be widely used because a manufacturing process of n-MOSFETs of the internal CMOS circuit may be used.
In this event, the first electrostatic protection circuit illustrated in
FIG. 1A
is equivalent to a circuit in which a substrate resistor Rsub of a p-type semiconductor substrate
12
is connected to a base electrode B of an npn-type parasitic bipolar transistor
11
.
A circuit diagram of the equivalent circuit is shown in
FIG. 1A
while current-voltage characteristics of the equivalent circuit are shown in FIG.
1
B.
Herein, description will be made about a principle of electrostatic protection with respect to the first electrostatic protection circuit using the parasitic bipolar transistor.
When an excessive negative voltage generated by an electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by the forward characteristics of an n+p junction between an n+ layer of an electrode S side and the p-type semiconductor substrate
12
.
More specifically, a forward current If flows so as to discharge static electricity to the ground by exceeding an offset voltage Vos, as illustrated in
FIGS. 1A and 1B
.
In the meantime, when an excessive positive voltage generated by the electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by snap-back characteristics for a reverse voltage.
In particular, as an applied voltage is increased, a reverse current Ir of the n+p junction is gradually increased, as shown in FIG.
1
B. The reverse current Ir flows into the substrate resistor Rsub, and a potential of the base electrode B is increased by a voltage drop (
15
).
When the potential reaches a first trigger potential (Vt
1
, It
1
), the potential of the base electrode B is increased. Thereby, the npn-type parasitic bipolar transistor
11
is turned on. Herein, the n+p junction of the npn-type parasitic bipolar transistor
11
is almost broken down near the first trigger potential (Vt
1
, It
1
) in FIG.
1
B.
Thereafter, a large current flows from the electrode S to an electrode D to discharge the static electricity to the ground (
16
).
When the applied voltage increases more, the current is also increased (
17
). Thereby, the npn-type parasitic bipolar transistor
11
is again broken down near a point of (Vt
2
, It
2
).
Consequently, the voltage is reduced while the current is increased (
18
). Finally, the devices are irreversibly changed by high-temperature heat are thereby broken (
19
).
Subsequently, description will be made about a second related electrostatic protection circuit.
The second related electrostatic protection circuit uses a parasitic thyrister
2
which is laterally directed, as illustrated in FIG.
2
A.
An equivalent circuit of the second related electrostatic protection circuit is illustrated in FIG.
1
C.
Such a circuit includes a lateral npn-type parasitic bipolar transistor
21
, a vertical pnp-type parasitic bipolar transistor, a resistor Rnw of an n-well region, and a substrate resistor Rsub of a p-type semiconductor substrate
22
, as illustrated in
FIGS. 2A and 2C
. Herein, the current-voltage characteristics of the equivalent circuit are shown in FIG.
2
B.
The electrostatic protection principle of the second related electrostatic protection circuit using a parasitic thyrister is almost the same as the above-mentioned electrostatic protection principle of the first related electrostatic protection circuit using the parasitic bipolar transistor.
Specifically, when the excessive negative voltage generated by the electrostatic discharge is applied to the input/output pad, the static electricity is discharged to the ground by the forward characteristics of an n+p junction between an n+ layer of an electrode C side and the p-type semiconductor substrate
22
.
Consequently, the forward current If flows so as to discharge the static electricity to the ground by exceeding the offset voltage Vos, as shown in FIG.
2
B.
On the other hand, when the excessive positive voltage generated by the electrostatic discharge is given to the input/output pad, the static electricity is discharged to the ground by the snap-back characteristics for the reverse voltage.
That is, as the applied voltage is increased, the reverse current of the n+p junction is gradually increased, as illustrated in FIG.
2
B. The reverse current flows into the substrate resistor Rsub, and the potential of the base electrode B is increased by a voltage drop (
15
′).
When the potential reaches a first trigger potential (Vt
1
, It
1
), the lateral npn-type parasitic bipolar transistor
21
is turned on by the increase of the potential of the base electrode B.
In consequence, the lateral thyrister
2
is turned on by a positive feedback operation of a pair of lateral and vertical transistors. Herein, it is to be noted that the n+p junction of the lateral npn-type parasitic bipolar transistor
21
is almost broken down near the first trigger potential (Vt
1
, It
1
) in FIG.
2
B.
Thereby, a large current flows from an electrode A to an electrode K to discharge the static electricity to the ground (
16
′).
When the applied voltage is further increased, the current is also increased (
17
′), and the lateral npn-type parasitic bipolar transistor
21
is again broken down near a point of (Vt
2
, It
2
). Consequently, a voltage is reduced while a current is increased (
18
′) in FIG.
2
B.
Finally, the device is irreversibly changed by high-temperature heat and is thereby broken (
19
′).
Meanwhile, the semiconductor device has been further reduced in size with micropatterning due to recent progress in technology. In the meantime, the semiconductor device becomes ever more sensitive with micropatterning. As a result, semiconductor devices are often broken by a low voltage.
In [the] recent years, the thickness of the gate insulating film of MOS devices has been thinned to about 4 nm, while the breakdown voltage of the gate insulating film has been reduced to about 7 V in CMOS devices which are super-micropatterned.
In the future, the micropatterning of semiconductor devices and the reduction in size of the devices will undoubtedly continue to advance.
Therefore, when the related electrostatic protection circuit is used in a
Jackson Stephen W.
Kitov Z
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