Electrostatic discharge protection silicon controlled...

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Device protection

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S358000, C257S361000, C257S362000, C257S363000

Reexamination Certificate

active

06770918

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to the field of electrostatic discharge (ESD) protection circuitry, and more specifically, silicon controlled rectifier (SCR) structures useful in ESD protection circuitry.
BACKGROUND OF THE INVENTION
Technologies utilizing high frequency signals, such as the mobile telephone and other wireless devices, are currently incorporating silicon germanium (SiGe) into the integrated circuits (ICs). The silicon germanium technology gives the chip manufacturers the ability to satisfy the analog/RF design requirements, such as transistor speed, while maintaining a high transistor current gain. The introduction of a SiGe layer over a silicon layer (e.g., N-epitaxial layer) forms a heterojunction therebetween. Accordingly, a heterojunction bipolar transistor (HBT) may be formed and integrated with functional circuitry, e.g., complimentary metal oxide semiconductor (CMOS) circuitry, on a chip. That is, the HBTs are used as functional RF circuitry, where the SiGe layer allows for producing high-speed transistors, which may be used for RF applications.
Semiconductor devices, such as IC's having the SiGe HBT transistors are sensitive to the high voltages that may be generated by contact with an ESD event. As such, electrostatic discharge (ESD) protection circuitry is essential for integrated circuits. An ESD event commonly results from the discharge of a high voltage potential (typically, several kilovolts) and leads to pulses of high current (several amperes) of a short duration (typically, 100 nanoseconds).
Recent studies have shown that functional heterojunction bipolar transistors also have some intrinsic ESD protection capabilities. For example, in one publication, it was shown that a functional HBT, without any additional ESD protection circuitry, was found to have measurable intrinsic ESD protection characteristics, as between two transistor terminals (e.g., base-collector, base-emitter, and the like). For a detailed understanding of one such study, the reader is directed to the publication entitled “Electrostatic Discharge Characterization of Epitaxial-Base Silicon-Germanium Heterojunction Bipolar Transistors” by S. Voldman et al., Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000, EOS-22, pp.239-250, IEEE Catalog No. 00TH8476, ISBN-1-58537-018-5.
However, the intrinsic ESD protection capabilities of a functional heterojunction bipolar transistor are limited, such that ESD protection (voltage clamping and current capability) for the functional circuitry may not be adequately provided. For example, an emitter-base junction can handle only very limited ESD current until a destructive failure occurs. One reason is that the ESD stress current has to flow from the base contact to the active base-emitter junction. Therefore, the current will flow in the extremely thin (e.g., 50 nanometers) layer of the SiGe that is connecting the base contact to the active transistor region. This leads to an early failure, as well as a significant voltage build-up at the device terminals, which makes the device unpractical for any ESD application, for example, of protecting RF receiver inputs where the base of the HBT is connected to the input terminal while the emitter is grounded.
An additional reason for such low current ESD failures may also be attributed to the long and narrow base poly-crystalline silicon connections that become necessary in practical RE transistor layout. Along these base poly-crystalline silicon connections, resistance increases, while the voltage drops during ESD, which is not permissible. Therefore, there is a need in the art for improved ESD protection devices in semiconductor technologies utilizing silicon-germanium technologies.
SUMMARY OF INVENTION
The disadvantages heretofore associated with the prior art are overcome by the present invention of an electrostatic discharge (ESD) protection device having a silicon controlled rectifier (SCR) for protecting circuitry of an integrated circuit (IC). The SCR comprises a vertical NPN transistor and a lateral PNP transistor.
In one embodiment, an N-doped (e.g., lightly doped or N-epitaxial) layer is disposed over a substrate and a first P doped region disposed over the N-epitaxial layer. A first N+ doped region is disposed over the P-doped region and coupled to ground. The first N+ doped region, first P-doped region, and N-epitaxial layer form the vertical NPN transistor of the SCR, where the first N+ doped region forms the cathode of the SCR.
A second P doped region is coupled to a protected pad. The second P doped region forms an anode of the SCR, and is disposed over the N-epitaxial layer and laterally positioned with respect to the first P doped region and electrically isolated from the first P doped region. The second P doped region, N-epitaxial layer, and first P doped region form the lateral PNP transistor of the SCR. A triggering device may be coupled to a gate of the SCR. For example, an external on-chip triggering device may be coupled to the gate of the SCR, where the triggering device resides on the same IC, but the triggering device does not share any components with the SCR. Alternatively, an integrated triggering device may be coupled to the gate of the SCR, where the triggering device resides on the same IC, as well as shares at least one component with the SCR.
In one embodiment, the first P-doped region is fabricated from a silicon-germanium (SiGe) lattice. As such, the vertical NPN transistor is a heterojunction bipolar transistor (HBT), which has low junction capacitance between the base (SiGe layer) and the collector (N-epi Si). An SCR incorporating a vertical HBT of the present invention is suitable for protecting circuitry operating under high frequency applications, such as circuitry in wireless devices.


REFERENCES:
patent: 3827073 (1974-07-01), Mize
patent: 5268588 (1993-12-01), Marum
patent: 5591661 (1997-01-01), Shiota
patent: 5708288 (1998-01-01), Quigley et al.
patent: 5747834 (1998-05-01), Chen et al.
patent: 5808342 (1998-09-01), Chen et al.
patent: 5821572 (1998-10-01), Walker et al.
patent: 6169309 (2001-01-01), Teggatz et al.
patent: 6396107 (2002-05-01), Brennan et al.
patent: 6576959 (2003-06-01), Kunz et al.
“Electrostatic Discharge Characterization of Epitaxial-Base Silicon-Germanium Heterojunction Bipolar Transistors”, by S. Voldman, et al, pp. 239 through 250; from Electrical Overstress/Electrostatic Discharge Symposium Proceedings, Anaheim, CA, Sep. 26-28, 2000.
“Modern Semiconductor Devices Physics,” ©1998 by John Wiley & Sons, Inc., p. 51.
“Semiconductor Devices, Physic & Technology,” ©1985 by Bell Telephone Laboratories, Inc., p. 154.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Electrostatic discharge protection silicon controlled... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrostatic discharge protection silicon controlled..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrostatic discharge protection silicon controlled... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3347273

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.