Electrostatic discharge protection for integrated circuits

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific voltage responsive fault sensor

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361 56, H02H 904, H02H 322

Patent

active

052394409

ABSTRACT:
A circuit is disclosed for protecting an integrated circuit or another circuit from damage due to electrostatic discharge. The protection circuit includes a triggering circuit and a clamping circuit. In response to an electrostatic discharge, the triggering circuit turns on the clamping circuit to clamp a node of the protected circuit to both an upper and a lower potential. This allows the electrostatic discharge to dissipate harmlessly to either potential source, depending upon its polarity. Preferably, the triggering circuit consists of a resistor-capacitor network which generates the required control signal every time power is supplied to the circuit being protected, while the clamping circuit consists of a pair of transistors for connecting an input pin to both the high and low potential sources. Typically, one protection circuit is coupled to each input/output pin of the integrated circuit being protected.

REFERENCES:
patent: 4870530 (1989-09-01), Hurst
Q. Say, "Resistorless ESD Protection Device for High Speed CMOS Circuits," Proc. of the IEEE 1988 Custom Integrated Circuits Conf., May 1988, pp. 27.2.1-27.2.4.
L. R. Avery, "ESD and the Effects on Integrated Circuit Reliability," New Electronics, Incorporating Electronics Today (Apr. 1985) 18(8):151-153.

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