Electrostatic discharge protection device for integrated...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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C257S355000

Reexamination Certificate

active

07009229

ABSTRACT:
A protection device for integrated circuits. A complementary well is fabricated in a semiconductor substrate. An enhancement mode junction field effect transistor (JFET) is fabricated in the complementary well. An interface bonding pad is fabricated above the JFET. A source contact is also fabricated in the well. The gate and drain of the JFET are coupled to the interface bonding pad and the source of the JFET is coupled to the substrate.

REFERENCES:
patent: 6774417 (2004-08-01), Lin et al.
H. Ogiwara, M. Hayakawa, T. Nishimura and M. Nakaoka; “High-Frequency Induction Heating Inverter with Multi-Resonant Mode Using Newly Developed Normally-Off Type Static Induction Transistors”; Department of Electrical Engineering, Ashikaga Institute of Technology, Japan; Department of Electrical Engineering, Oita University, Japan; Department of Electrical Engineering, Kobe University, Japan; pp. 1017-1023.
J. Baliga; “Highvoltage Junction-Gate Field Effect Transistor with Recessed Gates”; IEEE Transactions on Electron Devices; vol. ED-29; No. 10; Oct. 1982.
J.M. C. Stork et al.; “Small Geometry Depleted Base Bipolar Transistors (BSIT)- VLSI Devices?”; IEEE Transactions on Electron Devices; vol. ED-28; No. 11; Nov. 1981.
Nishizawa et al.; “Analysis of Static Characteristics of a Bipolar Mode SIT (BSIT)”; IEEE Transactions on Electron Devices; vol. ED-29; No. 11; Aug. 1982.
Caruso et al.; “Performance Analysis of a Bipolar Mode FET (BMFET) with Normally off Characteristics”; IEEE Transactions on Power Electronics; vol. 3; No. 2; Apr. 1988.
Nishizawa et al.; “Fieldeffect Transistor Versus Analog Transistor (Static Induction Transistor)”; IEEE Transactions on Electron Devices; vol. ED-24; No. 4; Apr. 1975.

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