Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1994-03-28
1996-06-25
Gaffin, Jeffrey A.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 91, 361118, H02H 300
Patent
active
055306128
ABSTRACT:
In device requiring ESD protection, a bias network is used to augment the diode string to distribute small but significant forward current to the diodes. Also employed is the use of cantilever diodes which provide PNP Darlington gain block for ESD protection rather than for amplifying signals in bipolar ICs. In one embodiment, the termination is the principal element of device novelty and that which makes the protection device "stand-alone". The termination supplies final base current to the gain block for a limited amount of time, so that ESD charge can be shunted harmlessly through the PNP chain, but assures that the structure draws no current from a stable power supply long term. The entire structure is able to absorb noise spikes as well as ESD pulses. The termination also makes provisions for discharging its capacitor between ESD pulses, as is necessary for standardized testing. The invention has value as an IC power supply clamp, and reduces the damage often seen on IC power supplies during extensive ESD testing.
REFERENCES:
patent: 3573550 (1971-04-01), Baker
patent: 3943427 (1976-03-01), Tolstov et al.
patent: 4585905 (1986-04-01), Brown
patent: 5311391 (1994-05-01), Dungan et al.
Gaffin Jeffrey A.
Intel Corporation
Jackson Stephen W.
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