Electrostatic discharge protection circuit using triple...

Details Electrostatic discharge protection circuit using triple... Electrostatic discharge protection circuit using triple...

2008-01-23

2009-08-18

DeBeradinis, Robert (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C257S355000, C257S357000

Reexamination Certificate

active

07576961

ABSTRACT:
Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs including PNP and NPN bipolar transistors. As a result, the ESD protection circuit can have greater discharge capacity.

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