Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2008-03-11
2010-11-23
Fureman, Jared J (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S091100, C361S111000
Reexamination Certificate
active
07839613
ABSTRACT:
An electrostatic discharge protection circuit protects the internal circuits of a semiconductor. The electrostatic discharge protection circuit includes a first electrostatic protection unit connected to a power source supply pad. The first electrostatic protection unit discharges an ESD current into the power source supply pad when an ESD is introduced into the input/output pad, and generates a first driving voltage by utilizing the ESD current flow through a voltage-drop unit. A driver driven by the first driving voltage generates a second driving voltage by an ESD current. A second electrostatic protection unit discharges the introduced ESD current into the power source supply pad by the second driving voltage such that a voltage applied to a gate of the first NMOS transistor is reduced.
REFERENCES:
patent: 6388850 (2002-05-01), Ker et al.
patent: 7286331 (2007-10-01), Choi
patent: 7582938 (2009-09-01), Chen
patent: 2003/0128486 (2003-07-01), Chuang et al.
Choi Nak Heon
Kwak Kook Whee
Clark Christopher J
Fureman Jared J
Hynix / Semiconductor Inc.
Ladas & Parry LLP
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