Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1989-07-13
1990-05-29
Deboer, Todd E.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 58, 361111, H02H 904
Patent
active
049300369
ABSTRACT:
A terminal of an integrated circuit is protected from electrostatic discharge voltages at the terminal by a protection circuit which includes a bidirectionally conductive transistor as a discharge current shunting device. A bidirectionally conductive controlled path is provided between the terminal and one of two voltage supply terminals. The transistor has a biassing resistor connected between the terminal and its control electrode. A normally reverse biassed diode is connected between the control electrode on another of the voltage supply terminals. For an n-channel FET or an npn bipolar transistor, when a positive electrostatic discharge is applied to the terminal, a current flowing through the biassing resistor turns on the transistor to provide a discharge path from the terminal to the voltage supply terminal. When a negative electrostatic discharge is applied to the terminal, the diode is forward biassed and a resulting current flow through the biassing resistor turns on the transistor to provide a discharge path from the voltage supply terminal to the terminal. The transistor may be either a symmetrical bipolar transistor or an enhancement mode FET. An embodiment of the circuit for protecting a gallium arsenide integrated circuit (GaAs IC) uses an enhancement mode MESFET and a Schottky barrier diode. For a p-channel FET or a pnp bipolar transistor the polarity of the discharge is reversed.
REFERENCES:
patent: 3777216 (1973-12-01), Armstrong
patent: 4131928 (1978-12-01), Davis et al.
patent: 4423431 (1983-12-01), Sasaki
patent: 4858055 (1989-08-01), Okitaka
Deboer Todd E.
Northern Telecom Limited
Smith Dallas F.
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