Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2006-07-04
2006-07-04
Yu, Phuong T. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S111000, C361S118000
Reexamination Certificate
active
07072157
ABSTRACT:
An electrostatic discharge protection circuit device is disclosed, which comprises a first electrostatic discharge protection circuit connected between a first external terminal and a first ground terminal, a second electrostatic discharge protection circuit connected between a second external terminal and a second ground terminal, the second electrostatic discharge protection circuit having substantially the same configuration as that of the first electrostatic discharge protection circuit, a trigger signal line which connects to each other output nodes of surge detection circuits of the first and second electrostatic discharge protection circuits, and transfers a surge detection output of the first or second electrostatic discharge protection circuit to the other electrostatic discharge protection circuit as a trigger signal, and a common discharge line connected directly to the first ground terminal, connected to the second ground terminal via a parallel circuit composed of a forward-connected parasitic diode element and a reverse-connected parasitic diode element.
REFERENCES:
patent: 5079612 (1992-01-01), Takamoto et al.
patent: 5821804 (1998-10-01), Nikutta et al.
patent: 6947267 (2005-09-01), Liu et al.
M.-D. Ker, et al., IEEE Journal of Solid-State Circuits, vol. 32, No. 1, pp. 38-51, “A Gate-Coupled PTLSCR/NTLSCR ESD Protection Circuit for Deep-Submicron Low-Voltage CMOS IC'S”, Jan. 1997.
Patel Dharti H.
Yu Phuong T.
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