Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2009-06-16
2011-12-06
Jackson, Stephen W (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
Reexamination Certificate
active
08072722
ABSTRACT:
Electrostatic discharge (ESD) can affect the operation of and even damage an unprotected integrated circuit. Conventional ESD protection circuits may not be able to protect the integrated circuit if the voltage at the output of the integrated circuit swings with large amplitude. In some embodiments, an ESD protection circuit comprising switching circuitry that provides a low AC impedance path to ground can prevent improper triggering of the ESD protection circuit during normal operation of the integrated circuit, while ensuring that the ESD protection circuit device reliability is not compromised.
REFERENCES:
patent: 5311391 (1994-05-01), Dungan et al.
patent: 6597227 (2003-07-01), Yue et al.
patent: 6661273 (2003-12-01), Lai et al.
patent: 6963112 (2005-11-01), Chen
patent: 7545614 (2009-06-01), Traynor et al.
patent: 7593204 (2009-09-01), Iversen et al.
patent: 2008/0019064 (2008-01-01), Chaine et al.
patent: 2011/0176245 (2011-07-01), Worley et al.
U.S. Appl. No. 12/109,240.
“U.S. Appl. No. 12/109,240 Office Action”, Jan. 11, 2010 , 11 pages.
Brooks Angela
DeLizio Gilliam, PLLC
Jackson Stephen W
Qualcomm Atheros, Inc.
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