Electrostatic discharge protection circuit

Details Electrostatic discharge protection circuit Electrostatic discharge protection circuit

2007-10-24

2008-12-16

Sherry, Michael J (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000, C361S118000

Reexamination Certificate

active

07466527

ABSTRACT:
An electro-static discharge protection circuit including a first-LDNMOS transistor, a second-LDNMOS transistor, a first-resistor, and a gate-driven resistance is provided. The drain of the first-LDNMOS transistor is served as an electro-static input end, the P-body and source of the first-LDNMOS transistor are connected to each other. A coupling-voltage signal determines whether the first-LDNMOS transistor is turned on or not. The drain, P-body, and gate of the second-LDNMOS transistor are respectively connected to the drain of the first-LDNMOS transistor, the source of the first-LDNMOS transistor, and a common-ground potential. The first-resistor is connected between the source of the first-LDNMOS transistor and the common-ground potential. One end of the gate-driven resistance is connected to the common-ground potential, the other end of the gate-driven resistance is connected to the source of the second-LDNMOS transistor to generate the coupling-voltage signal, and the coupling-voltage signal is coupled to the gate of the first-LDNMOS transistor.

REFERENCES:
patent: 5500546 (1996-03-01), Marum et al.
patent: 6583972 (2003-06-01), Verhaege et al.
patent: 7224949 (2007-05-01), Kluge et al.

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