Electrostatic discharge protection circuit

Details Electrostatic discharge protection circuit Electrostatic discharge protection circuit

2008-07-15

2008-07-15

Sherry, Michael J (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000

Reexamination Certificate

active

07400480

ABSTRACT:
Integrated circuits are provided that have sensitive circuitry such as programmable polysilicon fuses. Electrostatic discharge (ESD) protection circuitry is provided that prevents damage or undesired programming of the sensitive circuitry in the presence of an electrostatic discharge event. The electrostatic discharge protection circuitry may have a power ESD device that limits the voltage level across the sensitive circuitry to a maximum voltage and that draws current away from the sensitive circuitry when exposed to ESD signals. The electrostatic discharge protection circuitry may also have an ESD margin circuit that helps to prevent current flow through the sensitive circuitry when the maximum voltage is applied across the sensitive circuitry.

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Hun-Hsien Chang et al., “Improved Output ESD Protection by Dynamic Gate Floating Design” IEEE Transactions on Electron Devices, vol. 45, No. 9, Sep. 1998, pp. 2076-2078.

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