Electrostatic discharge input protection circuit

Details Electrostatic discharge input protection circuit Electrostatic discharge input protection circuit

2006-12-26

2006-12-26

Jackson, Jerome (Department: 2815)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S091100, C361S111000, C257S355000, C257S357000, C257S358000, C257S360000

Reexamination Certificate

active

07154721

ABSTRACT:
An ESD protection circuit includes: a first metal oxide semiconductor (MOS) transistor discharging an excessive electrostatic current generated between an input pad and an internal circuit, and having a first terminal connected to a ground voltage supply terminal; and a second MOS transistor discharging an electrostatic current generated between the input pad and the internal circuit, and having a gate and a first terminal connected to a bulk terminal of the first MOS transistor. The first terminal is connected to the ground voltage supply terminal through an interconnection line having a parasitic resistance with a predetermined value.

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