Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent
1997-07-09
1999-10-26
Gaffin, Jeffrey
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
361 58, 361111, 361118, H02H 900
Patent
active
059738979
ABSTRACT:
An electrostatic discharge (ESD) protection circuit with reduced high frequency signal distortion includes an additional input shunting diode and a voltage follower amplifier. This second diode and the original input shunting diode are connected in series between the circuit node to be protected and circuit ground so as to limit the voltage level at such node during an ESD event. The voltage follower amplifier maintains a substantially constant voltage across this second diode, thereby maintaining a substantially constant diode junction capacitance. Hence, with the introduction of this additional, serially connected junction capacitance of the second diode, the nonlinear input capacitance responsible for input signal distortion is reduced, plus with a substantially constant diode junction capacitance due to the use of the voltage follower amplifier, such reduced capacitance remains substantially more constant over variations in the input signal voltage.
REFERENCES:
patent: 5563757 (1996-10-01), Corsi
Biran Joseph
Opris Ion E.
Gaffin Jeffrey
Jackson Stephen
National Semiconductor Corporation
LandOfFree
Electrostatic discharge (ESD) protection circuit with reduced no does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrostatic discharge (ESD) protection circuit with reduced no, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrostatic discharge (ESD) protection circuit with reduced no will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-771293