Electrostatic discharge (ESD) circuit

Details Electrostatic discharge (ESD) circuit Electrostatic discharge (ESD) circuit

1996-04-23

2000-08-22

Gaffin, Jeffrey A.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 58, 361111, 257355, H02H 900

Patent

active

061081817

ABSTRACT:
An electrostatic discharge (ESD) discharge circuit provides robust protection to an integrated circuit (13). In one embodiment, a resistive element (71) ensures that current shunting bipolar devices (60, 62, and 68) turn-on before devices within the integrated circuit are damaged by secondary breakdown. In another embodiment, a two terminal device (69) provides base current to a bipolar device (60) that shunts excess charge. This two terminal device enters gate aided junction breakdown as does an N-type MOSFET (72 and 74) but does not exhibit the same snap-back characteristics during ESD. Consequently, the two terminal device ensures that the ESD circuit tracks process modifications to the integrated circuit.

REFERENCES:
patent: 5157573 (1992-10-01), Lee et al.
patent: 5182220 (1993-01-01), Ker et al.
patent: 5539327 (1996-07-01), Shigehava et al.
patent: 5541801 (1996-07-01), Lee et al.
patent: 5572394 (1996-11-01), Ker et al.
"Complementary-LVTSCR ESD Protection Circuit for Submicron CMOS VLSI/ULSI," Ker, et al., IEEE Transactions on Electron Devices, vol. 43, No. 4, Apr. 1996.

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