Electrostatic discharge cell of integrated circuit

Details Electrostatic discharge cell of integrated circuit Electrostatic discharge cell of integrated circuit

2001-07-23

2003-09-09

Toatley, Jr., Gregory J. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

Reexamination Certificate

active

06618230

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electrostatic discharge (ESD) cell and, more particularly, to an ESD cell applicable to multiple-power-input and mixed-voltage integrated circuits (ICs) and capable of maintaining power sequence independence of each power supply.
BACKGROUND OF THE INVENTION
The technique of ESD cell is well known to those of ordinary skill in the art. For instance, in a conventional method of providing ESD protection, a circuit is provided in the device to guide ESD of potential danger to a ground end, and is kept away from operating devices in the circuit during ESD event.
Generally speaking, a power source required by a chip is separately provided to avoid noise coupling between bus pins thereof. However, this way of providing a separate power source will cause the problem of ESD. As shown in
FIG. 1
, a power source V
cco
of an I/O pin
10
is separated from a power source V
ccl
connected to an internal circuit
12
, and a GND bus thereof is also separated. A resistance R
sub
exists between a ground end of pin, V
sso
, and a ground end of internal circuit, V
ssi
. When an ESD pulse is inputted to the pin
10
, the pulse current will be discharged via a path
1
shown in the figure with respect to the ground end V
ssi
, and this path
1
is the preferable discharge path. However, the resistance of the resistor R
sub
between the ground end V
ssi
and the ground end V
sso
may be too large so that a too large voltage drop is generated between the two ground ends when the pulse current flows through, resulting in a too large voltage difference between the pin
10
and the V
ssi
. If this voltage difference is too large, a path
2
shown in
FIG. 1
will start being conducted to perform ESD, hence damaging some devices of the internal circuit
12
due to high voltage discharge.
On the other hand, if there is an ESD cell
16
between the power sources V
cci
and V
cco
, as shown in
FIG. 2
, the ESD current will easily flow through a diode D
1
and the ESD cell
16
and then reach the power source V
ccl
, triggering a ESD power clamp
14
between the power source V
ccl
and the ground end V
ssi
, as a path
3
shown in the figure. Additionally, if there is another ESD cell
18
connected between the ground ends V
sso
and V
ssi
, the ESD current will more efficiently flow out from the ground end V
ssi
via a path
4
shown in the figure. The internal circuit
12
thus will not be overloaded by the ESD current and is protected by the ESD cells
16
and
18
. Therefore, ESD cells between different input power sources are very important to protect the internal circuit.
In the prior art, back-to-back diodes or diode-connected devices are usually used as an ESD cell for providing the above function. As shown in
FIGS. 3 and 4
, the number of diodes in these two kinds of ESD cells depends on the requirement of noise resistance or the voltage difference between different power sources at two ends of the circuit. As shown in
FIG. 3
, if the voltages of a rated power source V
cc1
and a power source V
cc2
are the same and the power source V
cc1
endures higher noise, the number of diodes from the power source V
cc1
to the power source V
cc2
needs to relatively increase to enhance the capability of noise resistance. However, the increase of the number of diodes will relatively reduce the protection benefit of this ESD cell. As shown in FIG.
4
, if the voltage of the power source V
cc1
is larger than that of the power source V
cc2
, diode-connected dervices between them needs to generate a voltage difference from the power source V
cc1
to the power source V
cc2
larger than the voltage difference between the two power sources to compensate the voltage difference in between, thereby avoiding undesirable load effect between the two power sources.
Exactly as said above, in order to avoid noise interference between pins of different power sources, a considerable number of diodes are used in the above ESD cells, relatively reducing the benefit of the cells. Additionally, these kinds of ESD modules will let power sources at two ends have a sequentially dependent characteristic, which has potential problems in circuit design. Moreover, because the functions of present ICs tend to be diversified, many different power sources are required to provide a separate power source for each individual internal circuit. In order to save power dissipation, each individual internal circuit can be independently activated or deactivated according to dynamic operational requirement. Such a sequential characteristic of power supply will easily cause problems in circuit design when using the above back-to-back diodes type ESD cell.
As shown in
FIG. 2
, in a power-saving mode, if the power source V
ccl
is deactivated, electric energy supplied by the power source V
cco
will flow to the deactivated power source V
cci
via the ESD cell, letting the power source V
ccl
start providing electric energy undesirably. Therefore, if the sequence of power supply between different power sources is improperly designed, the object of power saving cannot be achieved, and the situation of short circuit will also arise due to injection of current.
Accordingly, using back-to-back diodes or diode-connected devices as an ESD cell in the prior art has problems when the voltages of power sources are different, and has the problem of noise interference when the voltages thereof are the same. Moreover, the requirement of sequence independence of power sources cannot be met. In other words, when two power input pins of a chip require two different voltages, or the degrees of noise endurance are different, the number of diodes of the module needs to be modified, reducing the benefit of this ESD cell. In consideration of these problems, the present invention proposes an ESD cell applicable to multiple input sides of power sources so that current will not be drained from an activated input power source to a deactivated input power source no matter what the sequence of the input power sources is.
SUMMARY OF THE INVENTION
In consideration of the above problems in the prior art ESD cell, the primary object of the present invention is to provide an ESD cell applicable to multiple-power-input and mixed-voltage ICs and capable of maintaining power sequence independence of each power source, thereby achieving the object of whole chip protection.
Another object of the present invention is to provide an ESD cell to effectively isolate noise interference at two ends of a power supply and not to reduce its benefit of ESD protection, hence effectively resolving the drawbacks of the prior art ESD cell.
To achieve the above objects, an ESD cell of the present invention is formed of a voltage selector circuit, a RC circuit, and an N-type metal oxide semiconductor (NMOS). Two separate power source pins connected to the NMOS can conduct the channel thereof to connect the two separate power sources to lead out the ESD current along a designed path when enduring an ESD pulse, hence avoiding damage to internal circuits. The channel of the NMOS is conducted and keeps open circuit to really isolate the two power sources under normal operation.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which:


REFERENCES:
patent: 5610791 (1997-03-01), Voldman
patent: 5946177 (1999-08-01), Miller et al.
patent: 6118323 (2000-09-01), Chaine et al.
patent: 6118640 (2000-09-01), Kwong

Affiliated with

Also associated with

Rating

Electrostatic discharge cell of integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrostatic discharge cell of integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrostatic discharge cell of integrated circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3111380