Electrostatic discharge and excessive voltage protection circuit

Details Electrostatic discharge and excessive voltage protection circuit Electrostatic discharge and excessive voltage protection circuit

1996-11-20

1998-04-28

Young, Brian K.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, 361118, 361127, H02H 900

Patent

active

057453241

ABSTRACT:
An input protection circuit protects semiconductor circuits from ESD voltages and excessive voltages. The protection circuit includes an input/output node, a resistor (or other resistive element), and a varistor. The resistor has a first end coupled to the input/output node and a second end coupled to a port of the protected circuit. The varistor has a first end coupled to a ground node and a second end coupled to the second end of the resistor. The electronic circuit is coupled to the second end of the resistor and the second end of the varistor.

REFERENCES:
patent: 4547795 (1985-10-01), Wulff
patent: 4796080 (1989-01-01), Phy
patent: 4841259 (1989-06-01), Mayer
patent: 5089929 (1992-02-01), Hilland
patent: 5159518 (1992-10-01), Roy

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