Electrostatic breakdown preventing circuit for semiconductor...

Details Electrostatic breakdown preventing circuit for semiconductor... Electrostatic breakdown preventing circuit for semiconductor...

2006-09-05

2006-09-05

Sircus, Brian (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000

Reexamination Certificate

active

07102863

ABSTRACT:
An electrostatic breakdown preventing circuit has first and second conductive lines, a diode, a power clamp circuit and first and second capacitors. The first and second conductive lines are connected to a first potential source and a second potential source, respectively. The internal circuit is connected between the first and second conductive lines. The internal circuit operates in response to an input signal. The diode is connected in a forward direction between an input terminal and the second conductive line. The first capacitor is connected between the node and the first conductive line. The second capacitor is connected between the node and the second power conductive line. The capacitances of the first and second capacitors are set in such a manner that the transistor is brought to an OFF state upon a normal operation and brought to an ON state upon the input of an electrostatic surge.

REFERENCES:
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patent: 6650165 (2003-11-01), Mallikarjunaswamy
patent: 7503599 (1995-04-01), None

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