Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Contacting coating as it forms with solid member or material...
Reexamination Certificate
1999-12-28
2001-08-07
Gorgos, Kathryn (Department: 1712)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Contacting coating as it forms with solid member or material...
C205S098000, C205S117000, C205S118000, C205S123000, C205S157000, C204S22400M
Reexamination Certificate
active
06270646
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor processing, and more particularly to an apparatus and method for plating metals and/or alloys on resistive substrates.
BACKGROUND OF THE INVENTION
Electroplating of metals on a substrate is an important process in the manufacture of semiconductor devices. A conventional plating apparatus, known in the art as a “fountain plater,” is shown schematically in
FIG. 1. A
semiconductor wafer
1
is connected to a cathode
2
by contact pieces
3
, which hold the edge of the wafer and partially cover the front of the wafer near the edge. The wafer and a consumable anode
4
are immersed in a plating solution. Typically, a fluid flow is established in the plating solution from the anode to the cathode. An electrical circuit including a voltage source V and carrying a current I (also shown schematically in
FIG. 1
) is established between the cathode and anode. In addition, the cathode and wafer rotate with respect to the anode, to provide improved mass transport to the wafer surface.
In the semiconductor industry, there is a continuing trend to reduce the size of features on a wafer which must be plated. This in turn requires thinner seed layers, particularly in processes such as the “dual damascene” process. A reduced seed layer thickness causes the substrate to become more resistive, and furthermore causes greater nonuniformity in the thickness of the plated metal near point contacts to the wafer. In addition, the problem of nonuniformity of thickness across the wafer (that is, differences in metal deposition rates at different locations on the wafer) is exacerbated when thin plated deposits are required. Excess metal, deposited on field regions of the wafer and not in the features where plating is desired, is removed in a subsequent process. An increase in nonuniformity in the plating process requires an increase in excess metal deposition, leading to longer and more costly post-plating processing.
The use of plating contacts, covering portions of the front of the wafer, results in a number of processing problems. The plating contacts have metal deposited on their surfaces, particularly on the surface
3
a
exposed to the fluid flow from the anode. The areas of the wafer covered by the contacts are not plated, so that any chips including those areas are lost. In addition, the current density (and hence the metal deposition rate) varies with location on the wafer; the current density typically is higher at the wafer edge near the contacts. This in turn causes a buildup of excess metal on the edge chips, so that these chips suffer from electrical shorts even after the excess has been removed elsewhere on the wafer.
It will be appreciated that the wafer, in contact with the cathode as shown in
FIG. 1
, is a resistive element in the plating circuit. In particular, the seed layer on the surface of the wafer (on which plating is desired) may be characterized as a network of resistances in which the currents are not necessarily equal, so that the plating current density is non-uniform over the surface of the wafer. As the size of the features to be plated and the thickness of the seed layer both decrease, this non-uniformity is aggravated. Increasing the number of plating contacts improves the uniformity of the current density, but with the undesirable effects noted above.
Other types of plating contacts are well known in the art. For example, U.S. Pat. No. 1,739,657 describes a plating apparatus in which a porous material, soaked with a plating solution, makes contact with a cathodic workpiece. U.S. Pat. No. 5,277,785 describes applying a plating solution to the surface of a workpiece using a plastic brush. In these references, only a portion of the workpiece is contacted at any given time, and the problem of non-uniform current density across the workpiece is not addressed.
There remains a need for a plating apparatus in which the use of conventional wafer-edge plating contacts is avoided, and the uniformity of the plating process is improved. In particular, there is a need for a plating contact arrangement which takes into account the resistive properties of the workpiece, and which permits electrical contact with the entire surface of the workpiece.
SUMMARY OF THE INVENTION
The present invention addresses the above-described need by providing a plating apparatus for plating metal on a substrate (typically a semiconductor wafer), in which the electrical current density within the metal layer (including the seed layer and the plated metal) is more uniformly distributed across the wafer. In accordance with the present invention, this is done by providing a porous, compressible member between the wafer and the anode. The compressible member has a conductive surface covering substantially all of the substrate surface to be plated, so that the electrical plating current is thereby transmitted to the substrate. Since the compressible member is porous, it absorbs the plating solution and transmits the plating solution to the substrate. The surface of the substrate to be plated typically comprises a seed layer; the compressible member is in electrical contact with substantially all of the seed layer. The conductive surface may be formed of a polyaniline material.
A separation distance may be maintained between the substrate and the compressible member; this distance is controlled (for example, by moving the compressible member) to permit movement of the substrate with respect to the compressible member during a plating operation while maintaining electrical contact therewith. Specifically, a thin layer of plating solution may separate the wafer from the compressible member, so that the wafer may move relative to the compressible member without damage to structures on the wafer.
The plating apparatus may advantageously include a means for injecting a plating additive into the compressible member. As explained in more detail below, the plating process is improved by using a plating additive which inhibits plating at a certain location on the wafer, in accordance with a separation distance between the conductive surface of the compressible member and the wafer at that location.
It is desirable that the compressible member have vents for venting air, so that plating solution can be delivered reliably from the compressible member to the wafer.
In accordance with one aspect of the invention, the plating apparatus includes a cathode having a cathode potential in electrical contact with the substrate, and the conductive surface of the compressible member is at the cathode potential. In accordance with another aspect of the invention, the compressible member is not at the cathode potential in the circuit carrying the plating current.
According to an additional aspect of the invention, the plating apparatus includes an anode, and the compressible member is not at the cathode potential, but is in contact with the anode. The anode may have a plurality of holes formed therein to conduct the plating solution to the compressible member.
According to a further aspect of the invention, a method of plating metal on a surface of a substrate is provided, using the above-described plating apparatus. Specifically, this method includes the steps of providing a compressible member having a conductive surface covering substantially all of the surface of the substrate, the member being porous so as to absorb the plating solution; transmitting the plating current from the compressible member to the surface of the substrate through the conductive surface; and allowing the plating solution to be transmitted from the compressible member to the substrate.
REFERENCES:
patent: 1739657 (1929-12-01), Shemitz
patent: 4159934 (1979-07-01), Kadija
patent: 4786389 (1988-11-01), Moffitt
patent: 4800001 (1989-01-01), Ott et al.
patent: 5024735 (1991-06-01), Kadija
patent: 5277785 (1994-01-01), Van Anglen
patent: 5807165 (1998-09-01), Uzoh et al.
patent: 6004880 (1999-12-01), Liu et al.
patent: 6030550 (2000-02-01), Angelopoulos et al.
Chung Dean S.
Collins Lara Sandra
Corbin, Jr. William E.
Deligianni Hariklia
Edelstein Daniel Charles
Anderson Jay H.
Feely Michael J
Gorgos Kathryn
International Business Machines - Corporation
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