Electrooptical panel and electronic appliances

Details Electrooptical panel and electronic appliances Electrooptical panel and electronic appliances

1999-02-05

2001-01-09

Parker, Kenneth (Department: 2871)

Liquid crystal cells, elements and systems

Particular excitation of liquid crystal

Electrical excitation of liquid crystal

C349S041000, C438S670000

Reexamination Certificate

active

06172721

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to an active matrix electrooptical panel such as a liquid crystal panel having a thin film transistor (referred to TFT hereinafter) addressing-type panel, and to electronic appliances using the electrooptical panel.
2. Description of Related Art
FIG. 16
shows an active matrix liquid crystal panel having a plurality of pixel electrodes
9
a
provided in a matrix and a TFT switching element
30
′ for each pixel electrode. Scanning lines
3
a
and data lines
6
a
cross near each of the TFTs
30
′ and the pixel electrodes
9
a
are in electrical contact with a drain region of the TFTs
30
′ via contact holes
8
in a TFT array substrate. Each TFT
30
′ is constructed so that a channel region
1
a′
(the area indicated by hatch lines from the bottom to the left-top in
FIG. 16
) of a semiconductor layer
1
a
is controlled by a gate electrode
3
a′
extending from the scanning line
3
a.
The data line
6
a,
which supplies image signals, is put into electrical contact with the source region of the semiconductor layer
1
a
via a contact hole
5
. Since the pixel electrode
9
a
can be provided on various films including wiring connections for the TFT
30
′, data lines
6
a
and scanning lines
3
a,
or on the interlayer insulation films for insulating the pixel electrodes
9
a,
the pixel electrode
9
a
is put into electrical contact with the drain region of TFT
30
′ via the contact hole
8
formed in an interlayer insulation film.
To obtain a high resolution liquid crystal panel, pixels in the display must be made smaller (i.e., finer) and very precisely. However, narrowing the pixel pitch L as shown in
FIG. 16
to enable fine and precise image display by increasing pixel density or to compact the liquid crystal panel causes spaces between wiring lines that serve as non-opening regions to be narrowed. One important factor typically required for a liquid crystal panel is, on the other hand, increasing the brightness of the panel. Increased brightness can be realized by increasing the aperture ratio of the pixel, i.e., increasing the ratio of the opening region of the pixel to the image display region of the pixel. However, the TFT region, which includes wiring lines and switching elements for a pixel, serves as a non-opening region and when the pixel is made to be fine, the TFT region limits the extent to which the aperture ratio of the pixels can be increased. Accordingly, making the pixels fine results in narrowing of the distance between the contact holes
8
for contacting the pixel electrodes
9
a
with the TFT
30
′, and data lines
6
a
or scanning lines
3
a
, possibly causing fatal defects by forming short-circuits between the pixel electrodes
9
a
and respective wiring lines.
SUMMARY OF THE INVENTION
When increasing the aperture ratio of a pixel, it is important that, not only the wiring width of the data lines
6
a
and scanning lines
3
a
is narrowed, but also the TFT
30
′ as a switching element is made fine. For that purpose, the size of the contact hole
5
between the source region of the semiconductor layer
1
a
and data line
6
a,
and the size of the contact hole
8
between the drain region and pixel electrode
9
a
of the semiconductor layer
1
a
should be made fine.
FIG. 17
shows a cross-section of the TFT
30
′ along the line D-D′ in
FIG. 16
, indicating a process for opening the contact hole
8
. As shown in FIG.
17
(
a
), a gate insulation film
2
, interlayer insulation films
4
and
7
and a resist
302
are formed over the semiconductor layer
1
a.
As shown in FIG.
17
(
b
), a portion of the resist
302
is irradiated with light (to remove the resist
302
in the case of the positive-type resist) by exposing the resist
302
from the photomask side
303
through a hole in a chromium film
304
over the drain region
1
e
of the semiconductor layer
1
a.
However, the step between the interlayer insulation films
4
and
7
caused by the gate electrode
3
a′
causes a difficulty. When the contact hole
8
is formed in close vicinity to the gate electrode
3
a′
to make the size of TFT
30
′ minute, light is irregularly reflected by the step, causing a problem that the resist is exposed to light in the directions shown by the opposed arrows in FIG.
17
(
b
). This leaves a pattern of the removed resist
302
, or an opening for the contact hole, with a larger diameter than the hole in the light-shielding chromium film
304
on the photomask
303
. When this removed resist pattern is etched as shown in FIG.
17
(
c
), the diameter of the opening is larger than the pattern diameter for the contact hole formed on the photomask
303
, causing a difficulty for making the contact hole
8
fine.
A high quality display image and low power consumption are frequently required in liquid crystal panels. Thus, micro-lenses may be used for enhancing the efficiency of light incident on the liquid crystal panels. In the conventional art shown in
FIG. 16
, the incident light is partially blocked by the light-shielding film
22
provided on the opposing substrate so that the light passes inside the dashed lines. If the region where the light passes is not in line symmetry relation to the center of the pixel aperture, it is impossible to effectively use the light passing through the micro-lens at a maximum degree, and sufficiently obtain the efficiency of the incident light.
The invention provides an electrooptical panel and electronic appliances that include the electrooptical panel that avoid decreases in process yield and pixel aperture ratio even when pixels are made fine.
The invention provides an electrooptical panel having a plurality of data lines and scanning lines intersecting with the data lines, thin film transistors connected to corresponding data lines and pixel electrodes electrically connected to a corresponding thin film transistor. The thin film transistors each have a semiconductor layer separated from a gate electrode by a gate insulation film. At least one interlayer insulation film is formed over the semiconductor layer and gate electrode, and the drain regions of the thin film transistors are electronically connected to the pixel electrodes via contact holes formed through the interlayer insulation film. The contact holes are disposed in close proximity to at least one of the scanning lines and data lines, and a lift-up film is formed under the contact holes.
In one aspect of the invention, the lift-up film is formed under the contact hole so as to reduce the step height between at least one of the scanning lines and data lines and flattening the surface of the interlayer insulation. Therefore, preventing disclination of the liquid crystal due to step formation is possible. While a resist mask can be formed on the interlayer insulation film for allowing a desired region of the interlayer insulation film to be removed, reflection of light on the film surface can be suppressed to prevent retreat of the resist when the resist mask is exposed during a photolithographic process. Thus, the contact holes are formed with approximately the same size as that of the pattern on the mask. Accordingly, the dimension of the opening for the contact hole is not enlarged thereby increasing production yield with respect to pixel defects. Making the dimension of the contact holes accurately also allows the pixels to be made fine, thus providing a fine, precise and compact electrooptical panel.
In one aspect of the invention, at least one of the scanning line and data line, and the lift-up film have approximately the same film thickness.
The invention also provides an electrooptical panel having a plurality of data lines and scanning lines intersecting with the data lines, thin film transistors connected to corresponding data lines and pixel electrodes electrically connected to a corresponding thin film transistor. The thin film transistors each have a semiconductor layer separated from

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