Electronics unit

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

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Details

C257S709000, C257S713000, C257S731000, C257SE27113, C361S697000, C361S718000, C361S793000

Reexamination Certificate

active

07453145

ABSTRACT:
An electronics unit includes a low multi-point metallic mount on which an insulating layer is arranged. A conductor track system is arranged on the insulating layer and electronic power components are arranged on the conductor track system. The insulating layer is a sintered electrically insulating polymer layer on which the conductor track system, which comprises a sintered glass frit with a noble metal filling, is arranged.

REFERENCES:
patent: 3714709 (1973-02-01), Liederbach
patent: 4521476 (1985-06-01), Asai et al.
patent: 4724040 (1988-02-01), Iwasa
patent: 5016089 (1991-05-01), Fujii et al.
patent: 5104707 (1992-04-01), Watanabe et al.
patent: 5245510 (1993-09-01), Honda
patent: 5785879 (1998-07-01), Kawamura et al.
patent: 5917403 (1999-06-01), Hashimoto et al.
patent: 6417027 (2002-07-01), Akram
patent: 2002/0008967 (2002-01-01), Feustel et al.
patent: 1249869 (2002-10-01), None
patent: 1 210 175 (1970-10-01), None
Oba, T. et al. Sintering behavior of silver with various glass frits Published in: Electronic Manufacturing Technology Symposium 1995, Proceeding of 1995 Japan International, 18thIEEE/CPMT International 5 pages Dec. 4-6, 1995.
Ha, L. et al Thermal Study of additive multilayer circuitry on polymer and metal substrates Published in: Management Symposium, 198. SEMI-THERM Proceeding 1998., Fourteenth Annual IEEE 8 pages Mar. 10-12, 1998.

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