Communications: electrical – Digital comparator systems
Patent
1976-08-16
1977-11-01
Yusko, Donald J.
Communications: electrical
Digital comparator systems
364716, 365191, 365195, G11C 1140
Patent
active
040568075
ABSTRACT:
A crosspoint (X-Y) matrix array of electrically reprogrammable memory logic elements, such as an array of dual dielectric insulated gate field effect transistor (IGFET) structures, is interconnected in a single electrically reprogrammable diode logic array circuit, both for computing the logic function(s) of many variables and for writing and erasing the function(s). Each logic element's high current path is in series with a separate unidirectional diode in order to prevent sneak paths. Electrical access circuitry is also provided for computing the logic function(s) of many variables, each funtion being electrically alterable.
REFERENCES:
patent: 3665423 (1972-05-01), Nakanuma et al.
patent: 3686644 (1972-08-01), Christensen
patent: 3728695 (1973-04-01), Frohman-Bentchkowsky
patent: 3760378 (1973-09-01), Burns
patent: 3818452 (1974-06-01), Greer
patent: 3875567 (1975-04-01), Yamazaki et al.
patent: 3877054 (1975-04-01), Boulin et al.
Nippon Electric Company, Limited Publication Feb. 1972, "256 Bit Programable Mas Rom," pp. 1-8.
Bell Telephone Laboratories Incorporated
Caplan D.
Yusko Donald J.
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