Electronic timepiece having improved primary frequency divider r

Details Electronic timepiece having improved primary frequency divider r Electronic timepiece having improved primary frequency divider r

1981-07-07

1984-02-28

Roskoski, Bernard

Horology: time measuring systems or devices

Regulating means

For adjusting the frequency or beat

368204, 368181, G04B 1712

Patent

active

044339208

ABSTRACT:
In an electronic timepiece having a primary frequency divider circuit coupled to receive a standard frequency signal and comprising a group of P-channel FETs and a group of N-channel FETs, a bias circuit supplies a bias input to the P-channel FET group and a separate bias input to the N-channel FET group. By providing these bias inputs through current mirror coupling from a standard current source, the response of the primary frequency divider circuit to low amplitudes of the standard frequency signal can be made substantially independent of timepiece battery voltage variations, over a wide range of battery voltages.

REFERENCES:
patent: 4094137 (1978-06-01), Morokawa
patent: 4095407 (1978-06-01), Asano et al.
patent: 4119867 (1978-10-01), Morokawa et al.
patent: 4326277 (1982-04-01), Nishikubo
patent: 4328572 (1982-05-01), Kawahara
patent: 4333171 (1982-06-01), Nishikubo
patent: 4374332 (1983-02-01), Inami et al.

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