Electronic timepiece

Horology: time measuring systems or devices – Regulating means – For adjusting the frequency or beat

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G04B 1712

Patent

active

047071451

ABSTRACT:
An electronic timepiece has an oscillator for generating a high frequency time standard signal which is frequency-divided by a multi-stage divider circuit. A memory stores time adjustment information for use in adjusting the time in the event the oscillator time standard signal is higher than a predetermined frequency. The memory is connected to a preset circuit for presetting the divider circuit in accordance with the content of the memory. The divider circuit comprises 16 dividing stages and when no time adjustment is needed, the divider output is taken from the 15th stage in the conventional manner whereas when time adjustment is being carried out, the divider output is taken from the 16th stage. A selecting circuit applies either the output form the 15th or 16th stage to a display device depending on whether or not time adjustment information is stored in the memory.

REFERENCES:
patent: 3945194 (1976-03-01), Gollinger
patent: 4004407 (1977-01-01), Fujita
patent: 4020626 (1977-05-01), Kuwabara et al.
patent: 4055945 (1977-11-01), Schwarzschild
patent: 4101838 (1978-07-01), Alhara et al.
patent: 4142360 (1979-03-01), Akahane
patent: 4155218 (1979-05-01), Wiget

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