Electronic time switch

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370112, H04J 304, H04Q 1104

Patent

active

045382603

ABSTRACT:
There are provided first and second units each comprising first and second serially connected registers receiving inputs at different timings and a switch connected on the output side of the second register. The output sides of the switches of the first and second units are commonly connected together to form a pair, and a plurality of pairs are arranged in the form of a tree. Control signals having different control timings of the switches are sequentially applied to respective switches of each stage at a predetermined time spacing. The first register of the first stage constitutes a portion of data receiving means, and sequentially stores sequentially given data at a first timing. The second registers of the first stage are supplied with a common frame pulse to take in contents of respective first registers, while the first registers of the second and following stages sequentially store data at a third timing synchronous with but different from the second time.

REFERENCES:
patent: 3614327 (1971-10-01), Low
patent: 3754100 (1973-08-01), Jacob
patent: 4344170 (1982-08-01), Arita

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