Boots – shoes – and leggings
Patent
1993-07-07
1995-05-02
Mai, Tan V.
Boots, shoes, and leggings
395 27, G06J 100, G06F 1518
Patent
active
054125650
ABSTRACT:
An electronic synapse circuit is disclosed for multiplying an analog weight signal value by a digital state signal value to achieve a signed product value as a current which is capable of being summed with other such synapse circuit outputs. The circuit employs a storage multiplying digital-to-analog converter which provides storage for the analog weight signal value. Additional circuitry permits programming different analog weight signal values into the circuit, performing four-quadrant multiplication, generating a current summable output, and maintaining the stored analog weight signal value at a substantially constant value independent of the digital state signal values.
REFERENCES:
patent: 3651517 (1972-03-01), Kurek et al.
patent: 4126852 (1978-11-01), Baertsch
patent: 4262336 (1981-04-01), Pritchard
patent: 4308467 (1981-12-01), Kolluri et al.
patent: 4320391 (1982-03-01), Mallett
patent: 4425483 (1984-01-01), Lee et al.
patent: 4460970 (1984-07-01), McClary
patent: 4461986 (1984-07-01), Maynard et al.
patent: 4644193 (1987-02-01), Ott
patent: 4654815 (1987-03-01), Marin et al.
patent: 4779029 (1988-10-01), Henderson et al.
patent: 4926360 (1990-05-01), Spink, Jr.
patent: 4931674 (1990-06-01), Kub et al.
patent: 4990916 (1991-02-01), Wynne et al.
patent: 5039871 (1992-05-01), Engeler
patent: 5131072 (1992-07-01), Yoshizawa et al.
patent: 5136177 (1992-08-01), Castro
J. A. Schoeff, IEEE J. Solid-State Circuits, vol. SC-13, No. 6, Dec. 1978, "A Microprocessor-Compatible High-Speed . . . ," pp. 746-753.
S. Satyanarayana et al., Adv. in Neural Inf. Proc. Systems 2, Morgan Kaufmann Publishers, 1990, "A Reconfigurable Analog VLSI Neural . . . , " pp. 758-768.
A. Moopenn et al., Adv. in Neural Inf. Proc. Systems 2, Morgan Kaufmann Publ., "Digital-Analog Hybrid Synapse . . . ," pp. 769-776, 1990.
B. Boser et al., ISSCC91 Dig. of Tech. Papers, vol. 34, Paper TP11.3, Feb. 1991 "An Analog Neural Network Processor with . . . ".
A. M. Chiang et al., IEEE J. Solid-State Circuits, vol. 26, No. 12, Dec. 1991, "A CCD Programmable Image Processor and . . . ," pp. 1894-1901.
Boser Bernhard
Sackinger Eduard
AT&T Corp.
Mai Tan V.
Ranieri Gregory C.
LandOfFree
Electronic synapse circuit for artificial neural network does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic synapse circuit for artificial neural network, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic synapse circuit for artificial neural network will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1142523