Electronic substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S701000, C257S702000, C257S738000, C257S758000, C257S778000, C438S108000, C438S125000, C438S126000, C174S256000, C174S258000, C174S260000, C174S262000, C361S749000, C361S750000, C361S792000

Reexamination Certificate

active

06603201

ABSTRACT:

FIELD
This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to the construction of electronic substrates, or in other words package substrates, to which monolithic integrated circuits are mounted during packaging.
BACKGROUND
Electronic substrates, also called printed circuit boards or package substrates, are used as a platform for monolithic integrated circuits, such as array products like ball grid arrays, to which the monolithic integrated circuit is mounted and encapsulated.
The package substrate is typically formed of several electrically conductive layers, sandwiched between non electrically conductive layers and a non electrically conductive core. The electrically conductive layers, typically formed of a metal such as copper, are used for power and signal routing. The non electrically conductive core provides structural strength to the substrate, and reduces damage to the package from stresses such as those induced by mechanical load and thermal energy.
If careful attention is not paid to how the core is constructed, then the core will not perform its intended functions properly, and the packaged integrated circuit may fail. The non electrically conductive core is often formed of layers of woven glass fibers, called laminae. The laminae are stacked together in a resin matrix. Typically, a single lamina is woven of fibers that cross at right angles, or in other words at ninety degrees. The laminae are stacked in the resin, one on top of the other, typically without regard to how the fibers of the laminae are oriented one to another.
Unfortunately, a package substrate formed in this manner tends to twist, bend and otherwise warp when subjected to thermal loading, such as when the packaged integrated circuit is operating within a larger electronic circuit.
What is needed, therefore, is a package substrate design that has a greater resistance to problems such as thermal warpage.
SUMMARY
The above and other needs are met by a package substrate having sides, which is formed of multiple non electrically conductive layers laminated together. Each of the multiple non electrically conductive layers is formed of a first lamina and a second lamina bonded together in a resin matrix. The first lamina is formed of woven fibers having a first warp and a first weft. The first warp of the first lamina is disposed at a positive orientation of a first angle from the sides of the package substrate, where the first angle is neither zero degrees nor ninety degrees. The second lamina is also formed of woven fibers, having a second warp and second weft. The second warp of the second lamina is disposed at a negative orientation of the first angle from the sides of the package substrate. Electrically conductive layers are dispersed between different ones of the multiple non electrically conductive layers, with electrical connections dispersed between different ones of the electrically conductive layers.
In this manner, the alternating first and second warps of the first and second laminae reduce and preferably eliminate warpage of the package substrate, such as can be induced by thermal stresses. Further, because the warps are not disposed either parallel to or at ninety degrees to the sides of the package substrate, and therefore are similarly not disposed at either angle to the top and bottom of an orthogonal package substrate, there is a greater resistance to warpage of the package substrate.
In various preferred embodiments, the woven fibers of the first lamina and the second lamina are glass fibers. The electrically conductive layers are preferably formed of copper. Preferably, the first angle is between about thirty degrees and about sixty degrees. Also described is a packaged integrated circuit, comprising a substrate as described above, and a monolithic integrated circuit mounted to the substrate. Preferably, the monolithic integrated circuit is an application specific integrated circuit.


REFERENCES:
patent: 4876120 (1989-10-01), Belke et al.
patent: 5484647 (1996-01-01), Nakatani et al.
patent: 5785789 (1998-07-01), Gagnon et al.
patent: 5876842 (1999-03-01), Duffy et al.
patent: 5942315 (1999-08-01), Johnston
patent: 6048430 (2000-04-01), Johnston
patent: 6329610 (2001-12-01), Takubo et al.
patent: 03250648 (1991-11-01), None
patent: 04125140 (1992-04-01), None
patent: 05029764 (1993-02-01), None
patent: 07050486 (1995-02-01), None

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