Electronic signal level translating circuitry

Details Electronic signal level translating circuitry Electronic signal level translating circuitry

1978-06-30

1980-03-18

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307296R, 307DIG1, H03K 500

Patent

active

041941357

ABSTRACT:
This circuitry translates a relatively large voltage bi-level logical signal to an inphase relatively low voltage bi-level signal for bistatic current-switching logical circuitry. A transistor is connected in the common base circuit arrangement for a first order of input-output circuit isolation. Substantially complete isolation is afforded by a reference tracking circuit which is arranged to track exactly for temperature, base-to-emitter voltage and process variations. This circuit provides a potential at the base of the transistor which is the sum of the emitter-to-base voltage drop and one half of the applied energizing potential. The proper base potential is effected by simple adjustment of the ratio of the value of the input resistor to the value of the load resistor. Many such circuits may be operated on a single semiconductor chip.

REFERENCES:
patent: 3518449 (1970-06-01), Chung
patent: 3757137 (1973-09-01), Ahmed
patent: 3879576 (1975-04-01), Okada et al.
patent: 3970875 (1976-07-01), Leehan
patent: 3980963 (1976-09-01), Doi
R. F. Althaus et al., "NIM Fast Logic Modules Utilizing MECL III Integrated Circuits" Nuclear Science Symposium, Nov. 3-5, 1971, pp. 520-525.
"MECL III Integrated Circuits Data Book" 3rd Edition, Motorola, Inc., Sep. 1973, pp. 1-7 and 1-8.

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