Electronic processor for performing multiplication

Details Electronic processor for performing multiplication Electronic processor for performing multiplication

1994-11-15

1996-07-09

Malzahn, David H.

Boots, shoes, and leggings

G06F 752

Patent

active

055351514

ABSTRACT:
A processor which can further reduce the number of steps required for the operation of multiplication compared with conventional algorithms. Booth's algorithm is used for a decoding means in a unit signal processing section with a built-in one-bit full adder. This reduces the number of steps required for multiplication compared to conventional algorithms, thereby substantially improving the operating speed of a processor.

REFERENCES:
patent: 5231415 (1993-07-01), Hagihara
patent: 5235536 (1993-08-01), Matsuhishi et al.
patent: 5325320 (1994-06-01), Chiu
patent: 5333119 (1994-07-01), Raatz
patent: 5426599 (1995-06-01), Machida

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