Registers – Systems controlled by data bearing records – Credit or identification card systems
Patent
1988-06-01
1989-09-05
Pitts, Harold I.
Registers
Systems controlled by data bearing records
Credit or identification card systems
235379, G06K 500
Patent
active
048641103
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to an electronic payment process using a smart card.
It is known that electronic means already exist for carrying out certain transactions, such as e.g. the payment for goods, the payment for telephone communications or various services. This is undergoing rapid development, because it offers considerable advantages as regards speed, ease and security. It is possible to refer in this connection to "electronic money".
These means use a smart card, which is a plastic support in which is embedded an electronic component containing a microprocessor, which contains a data memory of several hundred bits produced in Eprom technology. It consists of an Electrically Programmable Read-Only Memory.
The electronic processing performed in such a card consists of making a payment unit or token correspond with each bit of a memory zone. A point of sale terminal equipped with a card reader performs a transaction by lacing a certain number of bits in the memory. The lacing of a bit consists of electrically passing a bit in the memory which was in logic state 1 corresponding to the crediting of one unit to logic state 0 corresponding to zero credit. As this data memory is produced in Eprom technology, this change of state is electrically irreversible.
These smart or chip cards have been described as with respect to their operation and applications in an article by Michel Ugon and Louis Guillou entitled "les cartes apuce" published in "La Recherche", no. 176, April 1986, vol. 17, pp. 472-479.
Although satisfactory in certain respects, these electronic payment processes suffer from disadvantages. Thus, on the one hand it is not possible to reload the card and on the other hand there is a high bit consumption, the number of laced bits being in fact equal to the number of tokens to be debited.
SUMMARY OF THE INVENTION
The object of the present invention is to obviate these disadvantages by proposing a process in which it is possible to reload the memory in order to recredit the same and in which it is sufficient to lace a single bit to debit any random number of units within the limits of the available credit. The possibility of reloading the card has led the inventor to call his system in picturesque manner an "electronic moneybox".
The process according to the invention is very simple. An Eprom comprises binary storage cells, whose content is equal to either 0 or 1. Each cell can be electrically laced by irreversibly passing its content from state 1 to state 0. The inventive process is characterized by the fact that the storage units are grouped into entities called "elements", each element being constituted by at least two storage cells. Each cell can be located in the memory by an address and has a parity: an element being called even when the number of its cells in state 1 is even and is called odd when the number of its cells in state 1 is odd.
According to the invention, the balance of the card is equal to the number of non-zero even elements, whose address is below the address of the odd element having the lowest address. The latter is called a "terminal". If said element does not exist (which is the case before the first debit), the number of non-zero even elements is equal to the total number of non-zero elements of the memory.
In order to debit the card and reduce the balance, the terminal is moved towards a lower address whilst creating another odd element with a lower address than the preceding address. This new odd element consequently becomes the new terminal. The number of debited units is equal to the number of non-zero even elements located between the old terminal and the new terminal, plus 1.
In order to credit the card and increase its balance, the terminal is moved towards a higher address, whilst giving again to any already odd elements with an address higher than the terminal to be displaced an even character. This is brought about by lacing another cell of these elements. A new odd element with a higher address is also produced. It can occur
REFERENCES:
patent: 4810862 (1989-03-01), Nakano
Etat Francis/Telediffusion De France
Pitts Harold I.
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