Electronic parts mounting board and production method thereof

Details Electronic parts mounting board and production method thereof Electronic parts mounting board and production method thereof

2002-02-21

2003-12-09

Cuneo, Kamand (Department: 2827)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S266000, C174S267000

Reexamination Certificate

active

06660941

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a NEW-TAB (Tape Automated Bonding) technology and a UFPL (Ultra Fine Pattern Lead-flame) technology, and particularly to an electronic parts mounting board suitable for a multilayer wiring board (buildup board) to be mounted on portable terminal devices, portable telephones, etc., and a method of producing the electronic parts mounting board.
Recently, in an information communication field, portable telephones, portable game devices, etc. having various functions in addition to a communication function have come to be frequently used along with development of multi-media. These portable terminal devices, etc. often use multilayer wiring boards on each of which a large number of electronic parts and wiring patterns for realizing a communication function, an information retrieving function, etc. are mounted.
Such a multilayer wiring board has required lightweightness and miniaturization, and has used an organic board having copper foils on both surfaces as a base board. The organic board is obtained by coating a glass fiber cloth called a glass epoxy prepreg with a semi-hardened epoxy resin.
A method of producing a multilayer board using such an organic board having copper foils on both surfaces includes the steps of coating the copper foils on both surfaces of the organic board with a resist and patterning the resist, removing an unnecessary copper foil by etching using the resist patterns as a mask, to form wiring patterns, forming contact holes passing through the organic board at specific positions of the wiring patterns, burying the contact holes with copper by electroless copper plating, and connecting the wiring patterns on both the surfaces to each other through the contact holes. The wiring board thus obtained is bonded to another wiring board obtained in the same manner by means of a thermosetting insulating member, to obtain a multilayer wiring board.
The multilayer wiring board using the organic board having copper foils on both the surfaces, however, has problems. Since the thickness of the prepreg is large, the finish thickness of the wiring board becomes large as the number of stacked layers of the wiring board becomes large. Further, since contact holes are formed by using a drill, diameters of the contact holes become large and the contact holes occupy large areas, to thereby obstruct higher density mounting, and a relative positional relationship between the contact holes is varied. Even if the contact holes are formed by laser beam drilling, an expensive equipment investment is required.
To solve such a problem, a buildup board production technology has been developed for reducing sizes, weights and costs of multilayer wiring boards. This board production technology is classified into the following four types:
(1) Photo Via Process
This process is carried out by preparing a core member for an inner layer, on both surfaces of which wiring patterns have been formed, forming a photosensitive insulating resin layer on both the surfaces of the core member, patterning the resist by photolithography, to form a resist mask, forming openings (via-holes) reaching the wiring patterns at specific positions using the resist mask, burying the openings with copper by copper plating, thereby forming electrodes (through-holes) for connection. With this process, the openings can be collectively formed by photolithography, it is possible to enhance a relative positional accuracy between the openings, and to shorten the contacts and form relatively small openings at a high resolution.
(2) First Laser Via Process
This process is carried out by preparing a core member for an inner layer, on both surfaces of which wiring patterns have been formed, forming a thermosetting insulating resin layer on both the surfaces of the core member, curing the thermosetting resin, forming openings (blind via-holes) reaching the wiring patterns at specific positions by laser beam drilling, and burying the openings with copper by copper plating, thereby forming electrodes (through-holes) for connection. With this process, since the blind via-holes are formed by laser beam drilling, the wiring board is less affected by contamination, and thereby the works in a clean room can be eliminated.
(3) Second Laser Via Process
This process is carried out by preparing a core member for an inner layer, on both surfaces of which wiring patterns have been formed, adhesively bonding copper foils, each of which is coated with a thermosetting insulating resin, on both surfaces of the core member, curing the thermosetting insulating resin, forming openings (blind via-holes) reaching the wiring patterns through the copper foils at specific positions by laser beam drilling, and burying the openings with copper by copper plating, thereby forming electrodes (through-holes) for connection.
With this process, since the blind via-holes are formed by laser beam drilling, the same advantage as that obtained by the first laser via process can be obtained, and since irregularities of the core member are buried in the thermosetting insulating resin, there can be obtained advantages that a multilayer wiring board having a larger number of layers can be easily obtained because of no irregularities of each core member, and that an adhesive force between the core members can be improved.
(4) Buried Bump Interconnection Technology Process
FIG. 3
is a sectional view showing a configuration example of a related art multilayer wiring board. A multilayer wiring board
10
shown in
FIG. 3
is formed by a buried bump interconnection technology process. The multilayer wiring board
10
includes a core member
1
having wiring patterns
3
A to
3
C on the back surface and electrodes
2
A to
2
C for connection on the inner layer side. Bump electrodes
4
A to
4
C are provided on the electrodes
2
A to
2
C of the core member
1
, respectively. A thermosetting insulating resin layer
5
is provided on the core member
1
in such a manner as to insulate the bump electrodes
4
A to
4
C. Circuit electrode patterns
6
A to
6
C are provided on the thermosetting insulating resin layer
5
and the bump electrodes
4
A to
4
C, respectively.
The bump electrodes
4
A to
4
C are formed by overprinting (bump-printing) copper-containing conductive paste at specific positions of a copper foil
2
shown in
FIG. 4A
in a state before the circuit electrode patterns
6
A to
6
C are formed, to form conical conductive paste portions
4
A′ to
4
C′, curing the conical conductive paste portions
4
A′ to
4
C′, superimposing the core member
1
, the thermosetting insulating resin layer
5
, and the copper foil
2
with the conical conductive paste portions
4
A′ to
4
C′ as shown in
FIG. 4B
, and hot-pressing them in such a manner that the conical conductive paste portions
4
A′ to
4
C′ pass through the thermosetting insulating resin layer
5
and reach the electrodes
2
A to
2
C of the core member
1
, respectively. With this process, it is possible to eliminate the work of forming openings for connection, enhancing a relative positional accuracy between the contacts, and shortening the contacts.
The above-described related art buried bump interconnection technology process, however, has a problem. The conical conductive paste portions
4
A′ to
4
C′ must be formed by bump-printing the conductive paste on the copper foil
2
in order to form the bump electrodes
4
A to
4
C. At this time, since the conductive paste must be overprinted, variations in widths and heights of the conductive paste portions may become large. As a result, it is difficult to form contacts having small diameters due to the limited accuracy of bump printing, thereby obstructing higher density mounting of a multi-layer wiring board. In addition, the other three processes have the following problems:
According to the photo via process, since the via-holes are formed by photolithography, the board is liable to be affected by contamination at the time of exposure, a

Affiliated with

Also associated with

Rating

Electronic parts mounting board and production method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electronic parts mounting board and production method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic parts mounting board and production method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3163435