Electronic package with thermally conductive standoff

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S710000, C257S719000

Reexamination Certificate

active

06631078

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates, in general, to an electronic semiconductor package and, more particularly, to an electronic semiconductor package having standoffs positioned within the central portion of the package base.
2. Background and Related Art
To reduce manufacturing costs, the electronic industry is continuously redesigning electronic packaging. To this end, the industry is increasingly employing ball grid array (BGA) packages where, for example, the perimeter of the package is used to make electrical connections. In perimeter packages, such as BGA packages, conductive solder balls may be arranged in a patterned array of peripheral pads on the laminate holding the semiconductor chip.
In addition to manufacturing cost reduction, the electronics industry is continuously endeavoring to reduce both the size of electronic packages and the pitch between conductive solder balls in order to accommodate the higher counts coming from higher density chips. With increased speed and smaller packages, increased heat may cause an increased failure rate of solder joints during temperature cycling due to the higher strain levels at the joints.
To reduce the levels of heat generated within electronic packages, and thus solder joint fatigue, various forms of heat dissipating means have been employed. One mechanism employed to facilitate heat dissipation is a heat sink positioned external to the package. One low cost method of attaching a heat sink to the electronic package is to mechanically clamp the heat sink to the package through a heat spreader and flexible thermal interface pad. However, to achieve good thermal conduction, these pads must be compressed with a sufficiently large pressure which tends to apply pressure to the solder balls. To further reduce the failure rate of solder joints, efforts have been made in the prior art to maintain height in the solder balls which would otherwise be lost due to solder ball collapse during reflow. The reason for controlling solder ball height is that the thinner the solder ball joint, once solidified, the more prone that joint is to fatigue fracture. One technique for controlling the height of solder ball joints during reflow is to use standoffs. Typical of such arrangements are those described in U.S. Pat. No. 5,541,450 to Jones, et al. and U.S. Pat. No. 5,805,427 to Hofmnan.
The difficulty with prior art standoff arrangements is that they are not designed to withstand any significant external pressure applied to the package and thereby limit the pressure acting on the component. Moreover, the prior art standoff arrangements typically are bonded to the PCB and electronic package which bonding may tend to cause warping due to thermal differences in the TCE of the materials which are bonded. In addition, such standoff arrangements fail to effectively provide any significant thermal dissipation paths to reduce the level of heat generated in the electronic package. The use of bonding to hold the electronic package to the PCB also makes assembly and rework difficult and costly.
SUMMARY OF THE PRESENT INVENTION
Accordingly, it is an object of the present invention to provide a method and apparatus for attaching an electronic module to a substrate therefor, such as, a PCB.
It is a further object of the present invention to provide a low cost arrangement for attaching an electronic module to a substrate therefor, such as, a PCB.
It is yet a further object of the present invention to provide structural arrangements for attaching an electronic package to a substrate, such as PCB, so as to provide effective thermal conduction paths therethrough.
It is still yet a further object of the present invention to provide a method and apparatus for improving heat dissipation from an electronic package.
It is another object of the present invention to provide a method and apparatus for attaching an electronic package to a PCB in a manner to reduce thermal warp between package and PCB and thermal fatigue on solder ball connections therebetween.
It is yet another object of the present invention to provide a method and apparatus for attaching an electronic package to a PCB so as to provide minimal force upon the solder ball connections therebetween.
It is still yet another object of the present invention to provide standoffs positioned between electronic module and PCB which standoffs are such as to provide both thermal dissipation paths from the module and sufficient resilience to absorb relatively high mechanical loads so as to result in minimal or no stress on solder connections therebetween.
In accordance with the present invention, there is provided an improved method and apparatus of attaching an electronic package or module to a substrate therefor, such as, a PCB. A resilient standoff structure is positioned between the electronic module and PCB with the resilient force of the standoff sufficient to withstand subsequent clamping forces used to hold the module to the board. Standoff structures are selected so as to provide, in addition to resilience, thermal conduction and convection paths away from electronic module. A heat sink structure is used to clamp the electronic module and standoff to the PCB so as to provide a major path for heat dissipation through the heat sink and additional paths of heat dissipation through the standoff. The clamping force is offset by the resilient force of the standoff such as to provide zero or minimal forces on the solder ball connections between the electronic module and PCB. Standoff structural layers which are non-resilient and porous, such as rigid foam, may also used.
The standoff structures are such as to provide resistance to warping while acting to control the height of the solder balls upon reflow. The open or porous nature of the standoffs is such as to provide air pathways that permit thermal dissipation through air flow in addition to the thermal conduction through the standoff structure. By mechanically clamping (rather than bonding) the standoffs between the electronic module and PCB, warpage due to differences in the TCE of the module and PCB materials is reduced.


REFERENCES:
patent: 5045921 (1991-09-01), Lin et al.
patent: 5170931 (1992-12-01), Desai et al.
patent: 5541450 (1996-07-01), Jones et al.
patent: 5661902 (1997-09-01), Katchmar
patent: 5714803 (1998-02-01), Queyssac
patent: 5781412 (1998-07-01), de Sorgo
patent: 5804882 (1998-09-01), Tsukagoshi et al.
patent: 5805427 (1998-09-01), Hoffman
patent: 5889652 (1999-03-01), Turturro
patent: 5901041 (1999-05-01), Davies et al.
patent: 5931371 (1999-08-01), Pao et al.
patent: 6016007 (2000-01-01), Sanger et al.
patent: 6268239 (2001-07-01), Ikeda
patent: 6411513 (2002-06-01), Bedard
IBM Technical Disclosure Bulletin by V.D. Coombs, entitled “Chip Mounting With Prestretched Joints”, vol. 16, No. 3, Aug. 1973, pp. 767.
IBM Technical Disclosure Bulletin by A.F. Galloway, et al., entitled “Stand-Offs For Chip Allignment As Well As Controlled Collapse In Chip Joining”, vol. 23, No. 5, Oct. 1980, pp. 2156-2158.
IBM Technical Disclosure Bulletin by R.A. Foster, entitled “Area Array Substrate-To-Carrier Interconnection Using Corner Standoff”, vol. 29, No. 11, Apr. 1987, pp. 4736-4737.

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