Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-02-08
2001-06-26
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C174S258000
Reexamination Certificate
active
06252179
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to electrical circuit cards and their manufacture.
BACKGROUND OF THE INVENTION
Circuit boards today are still called “printed circuit boards”, even though such boards seldom are “printed”. Regardless of how made, these must conform to stringent safety requirements with respect to operating voltages, dielectric breakdown voltages, and the ability to dissipate heat during operating conditions, etc.
When these safety requirements call for ability to operate under voltages of at least 2500 volts, this dictates minimum dielectric thicknesses, which often present heat dissipation problems. Of course, cooling by forced air or water can be provided, but this arrangement causes other problems.
U.S. Pat. No. 4,993,148 to Adachi et al. describes a method for forming a circuit board that involves plating conductor layers on a pre-defined dielectric layer that leaves a portion of the conductor exposed for mounting components. This method involves applying a copper foil, defining a conductor and via pattern in the copper foil and then using the conductor and via pattern to define the dielectric.
U.S. Pat. No. 4,999,740 to Ilardi et al. describes a circuit board made by building a layer of photo-imageable dielectric material on a metal substrate and imaging the dielectric to create wells for mounting components on the metal substrate. This patent does not involve multiple wiring layers.
U.S. Pat. No. 5,081,562 to Adachi et al. describes a circuit board with a metal plate on which a photo-sensitive insulating layer is formed leaving portions of the metal plate exposed for component mounting areas. The circuit board requires copper plating of conductors and vias.
U.S. Pat. No. 5,670,750 to Lauffer et al. describes a circuit card which includes a substrate formed of a metal carrier having a dielectric material on at least one surface to support an electronic card of a predetermined configuration. Selected areas of the electronic card have portions removed for mounting components called for by the circuit arrangement and the operating requirements. The substrate comprises a metal carrier on which a first dry film dielectric layer is formed, dried, and cured. The dry film dielectric can also be a liquid dielectric that is screen printed and dried on the surface of the metal carrier.
The patents identified above are incorporated herein by reference.
The present invention permits use of a very cost-efficient manufacturing process, namely, a process wherein copper plating of conductors is eliminated. This advantage is even more significant in the manufacture of power circuit cards that involve thicker copper and require more manufacturing time. Such an invention is considered a significant advancement in the art.
A further advantage that is significant with the circuit card arrangement of the present invention is in its elimination of the usual requirement of copper plating, which permits higher wiring densities to be obtained.
Yet another advantage of the present invention is obtained by the use of thin coatings for the materials of high dielectric breakdown strength, which thin materials also provide a minimal thermal resistance. When used in conjunction with openings in the dielectric for component mounting, a more effective heat dissipating circuit card structure results.
OBJECTS AND SUMMARY OF THE INVENTION
It is a principal object of the present invention to provide a new and improved circuit package that overcomes deficiencies inherent in many known packages.
It is also an object of the invention to provide a new and improved method of manufacturing such a package.
According to one aspect of the invention, there is provided an electronic circuit package comprising a metal carrier having high thermal conductivity properties, a first dielectric layer comprised of a substantially cured resin glass material positioned on the metal carrier to provide electrical insulation, a first electrically conductive circuit layer positioned on the first dielectric layer, a second dielectric layer positioned on the first electrically conductive circuit layer and comprised of a substantially imaged photoimageable dielectric including at least one via therein, a second electrically conductive circuit layer having a predetermined pattern positioned on the second dielectric layer, and at least one electrical interconnection between the first and second electrically conductive circuit layers, the electrical interconnection occurring through the via.
According to another aspect of the invention, there is provided a method of making an electronic circuit package comprising the steps of providing a metal carrier having high thermal conductivity properties, forming a first dielectric layer comprised of a substantially cured resin glass material positioned on the metal carrier to provide electrical insulation, forming a first electrically conductive circuit layer positioned on the first dielectric layer, forming a second dielectric layer positioned on the first electrically conductive circuit layer and comprised of a substantially imaged photoimageable dielectric including at least one via therein, forming a second electrically conductive layer having a predetermined pattern positioned on the second dielectric layer, and forming at least one electrical interconnection between the first and second electrically conductive circuit layers through the via.
The above and other objects, advantages and features of the present invention will become more readily apparent from the following detailed description of the presently preferred embodiment as illustrated in the accompanying drawings.
REFERENCES:
patent: 4396936 (1983-08-01), McIver et al.
patent: 4993148 (1991-02-01), Adachi et al.
patent: 4999740 (1991-03-01), Hardi et al.
patent: 5079065 (1992-01-01), Masakazu et al.
patent: 5081562 (1992-01-01), Adachi et al.
patent: 5416278 (1995-05-01), Ostrem et al.
patent: 5497545 (1996-03-01), Watanabe et al.
patent: 5519176 (1996-05-01), Goodman et al.
patent: 5539618 (1996-07-01), Wiesa et al.
patent: 5670750 (1997-09-01), Lauffer et al.
patent: 5736681 (1998-04-01), Yamamoto et al.
Lauffer John M.
Papathomas Kostantinos I.
Cuneo Kamand
Daugherty Patrick J.
Driggs Lucas Brubaker & Hogg Co. LPA
Gaffin Jeffrey
International Business Machines - Corporation
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