Electronic package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

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Details

257717, 257673, 257700, 257738, 257778, 257779, 257783, 257786, H01L 2334, H01L 23495, H01L 2348

Patent

active

057510601

ABSTRACT:
An electronic package which includes a thermally conductive, e.g., copper, member having a thin layer of dielectric material, e.g., polyimide, on at least one surface thereof. On the polyimide is provided the desired high density circuit pattern which is electrically connected, e.g., using solder or wirebonds, to the respective contact sites of a semiconductor chip. If wirebonds are used, the copper member preferably includes an indentation therein and the chip is secured, e.g., using adhesive, within this indentation. If solder is used to couple the chip, a plurality of small diameter solder elements are connected to respective contact sites of the chip and to respective ones of the pads and/or lines of the provided circuit pattern. Significantly, the pattern possesses lines and/or pads in one portion which are of high density and lines and/or pads in another portion which are of lesser density. The chip is coupled to the higher density portion of the circuitry which then may "fan out" to the lesser (and larger) density lines and/or pads of the other portion of the circuitry. The resulting package is also of a thin profile configuration and particularly adapted for being positioned on and electrically coupled to a PCB or the like substrate having conductors thereon.

REFERENCES:
patent: 5616958 (1997-04-01), Laine et al.

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