Electronic musical instrument

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364715, 364757, 84 101, G06F 1300, G06F 738, G06F 752, G10H 100

Patent

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047363339

ABSTRACT:
An array of universal processing elements (UPEs) may be interconnected through a switching matrix in response to control words which are in turn produced by a programmed digital computer in response to commands from a keyboard or a data file, thereby routing the outputs of selected UPEs to other UPEs for further processing and/or combining a sound stream in digital form. The matrix is comprised of both local and global conductors, the local ones being available to selected groups of UPEs. Each UPE is implemented as a digital multiplier, preferably with pipelining, and each UPE is comprised of a plurality of stages, preferably implemented with an adder for computing the sum of a plus the Boolean logic function [b.multidot.m+d.multidot.m] and a multiplexer for forming the function [b.multidot.+d.multidot.m], where a, b, d and m are bits of the respective two's complement number A, B, D and M, whereby the entire array of stages in a UPE computes A+[B.times.M+D.times.(1-M)].

REFERENCES:
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patent: 4507748 (1985-03-01), Cotton
R. F. Lyon, Two's Complement Pipeline Multipliers, Concise Papers, IEEE Transactions on Communications, Apr. 1976, pp. 418-425.
R. K. Richards, Arithmetic Operations in Digital Computers, D. Van Nostrand Company, Inc., 1955, pp. 303-311.
Robert Steven Ledley, L. S. Rotolo, James Bruce Wilson, Digital Computer and Control Engineering, McGraw-Hill Book Co., Inc. 1960, pp. 256-262.
Richard F. Lyon, A Bit-Serial VLSI Architectural Methodology for Signal VLSI System Design Area, Xerox Palo Alto Research Center, 3333 Coyote Hill Road, Palo Alto, Calif. 94304, pp. 131-140.

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