Static information storage and retrieval – Addressing – Sequential
Reexamination Certificate
2000-02-17
2001-10-30
Nelms, David (Department: 2818)
Static information storage and retrieval
Addressing
Sequential
C365S230030
Reexamination Certificate
active
06310827
ABSTRACT:
The present invention concerns an electronic memory and an electronic device provided with such a memory. In particular, the invention concerns the protection of data contained in an electronic memory and the control of access to such data or to the possibility of writing in the memory.
Generally speaking, the memory blocks or bit sequences forming a memory are protected, if required, by a protective or access bit. The level of protection provided by these protective bits is relatively average given that it is possible to alter their state by a physical action, in particular by an increase in temperature, ultraviolet radiation or other action generating the same result. It will be noted that these physical actions may be deliberate for the purpose of lifting the protection to have access to the memory data, either to read them, or to write other data in the memory. However, it should be noted that a memory may also be subjected to such aforementioned physical action by an unexpected variation in the conditions surrounding the memory, in particular as regards the increase in temperature.
An object of the present invention is to provide a memory fitted with protective means having a higher level of security. In particular, the object of the present invention is to overcome the reduction in protection which can result from physical action on the memory.
The present invention therefore concerns an electronic memory including at least one block associated with protective means for controlling access to data comprised in said block, this memory being characterised in that said protective means include a protective sequence of at least two bits and a decision unit which closes access to said block when the logic states of the bits of said sequence are identical.
As a result of these features any physical action on the memory and more particularly on the protective sequences generates a block on access to the protected data in the memory. The consequence of physical actions is generally to set all the bits subjected to the action to the same logic state, i.e. either the <<0>> logic state or the <<1>> logic state.
REFERENCES:
patent: 4734768 (1988-03-01), Pexa
patent: 5724551 (1998-03-01), Greenstein et al.
Patent Abstracts of Japan vol. 004 No. 146, Oct. 15, 1980 & JP 55 093595 (Hitachi Ltd), Jul. 16, 1980.
EM Microelectronic-Marin SA
Griffin & Szipl, P.C.
Le Thong
Nelms David
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