Electronic material, its manufacturing method, dielectric capaci

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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257298, 257295, 257310, 257769, H01L 2348

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active

060435615

ABSTRACT:
It is intended to provide an electronic material which permits not only PZT but also SBT requiring high-temperature annealing to be used as the material of a dielectric film of a dielectric capacitor in vertical alignment with a transistor so as to connect the lower electrode of the dielectric capacitor to a diffusion layer of the transistor with a Si or W plug; its manufacturing method; and a ferroelectric capacitor and nonvolatile memory. There is also provided a semiconductor device permitting greater freedom in selecting the process temperature and time in a later step subsequent to formation of the plug. Used as the material of the lower electrode of the dielectric capacitor is a material expressed by the composition formula Pd.sub.a (Rh.sub.100-x-y-z Pt.sub.x Ir.sub.y Ru.sub.z).sub.b O.sub.c where a, b, c, x, y and z are composition ratios in atomic %) in which the composition ratios satisfy 70.gtoreq.a.gtoreq.20, 40.gtoreq.b.gtoreq.10, 60.gtoreq.c.gtoreq.15, a+b+c=100, 100>x.gtoreq.0, 100>y.gtoreq.0, 100>z.gtoreq.0 and 100>x+y+z.gtoreq.0. This material is also used as the material of a diffusion preventing layer interposed between the diffusion layer of the semiconductor device and the overlying plug.

REFERENCES:
patent: 5612574 (1997-03-01), Summerfelt et al.
patent: 5790366 (1998-08-01), Desu et al.
patent: 5825609 (1998-10-01), Andricacos et al.
patent: 5932907 (1999-08-01), Grill et al.
Bhatt et al., "Novel high temperature multilayer electrode-barrier structure for high-density ferroelectric memories", Appl. Phys. lett. 71 (5), p. 719-721, Aug. 4, 1997.

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