Electronic hold release circuit

Details Electronic hold release circuit Electronic hold release circuit

1982-11-26

1984-05-08

Pellinen, A. D.

179 99H, H04M 100

Patent

active

044476744

ABSTRACT:
In a hold circuit including a silicon controlled rectifier (SCR) normally turned on and connecting the hold circuit to a subscriber line, a first hold release circuit outputs a trigger signal to a transistor turning off the transistor and disconnecting a line seizing network. A second hold release circuit outputs a trigger signal to a second transistor responsive to the line seizing network being disconnected. The second transistor connects a load resistor across the SCR dropping the holding current flowing through the SCR causing it to turn off. The second hold release circuit is also arranged to output its trigger signal to the second transistor responsive to a pre-arranged timing interval.

REFERENCES:
patent: 4001520 (1977-01-01), Waldman et al.
patent: 4011413 (1977-03-01), Phillips
patent: 4093829 (1978-06-01), Silberman
patent: 4258232 (1981-03-01), Smith et al.
patent: 4365117 (1982-12-01), Curtis
patent: 4387274 (1983-06-01), Stein et al.
patent: 4394543 (1983-07-01), Keiper, Jr. et al.
patent: 4394544 (1983-07-01), De Leon

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