Electricity: electrical systems and devices – Safety and protection of systems and devices – Impedance insertion
Patent
1986-12-05
1988-06-21
Pellinen, A. D.
Electricity: electrical systems and devices
Safety and protection of systems and devices
Impedance insertion
361 83, 361 91, 361100, 363 49, 363 50, H02H 320
Patent
active
047528524
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The invention relates to an electronic fuse intended to be triggered should the current through a load exceed a predetermined value, the fuse containing current-sensing and current-limiting circuits as well as a time circuit, whereby the load current is first restricted and then interrupted entirely on exceeding the determined value.
BACKGROUND ART
An electronic fuse according to the above is described in SE-8201003-4. Two current paths are coupled in parallel in series with the load, one of the paths having low resistance and the other containing a current-limiting resistor. If the load current exceeds the predetermined value, it is limited first by the low-resistive current path being controlled to become non-conductive. After a fixed time determined by an RC dircuit the current is interrupted entirely by the second current path also becoming non-conductive.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an electronic fuse of the above type kind give in the introduction, such that when the load current exceeds the predetermined value the fuse limits this current in a flexible manner to a value somewhat exceeding the predetermined value, and subseqently interrupts it entirely after a time determined by the time circuit. This is achieved by a controllable switch connected in series with the load current, and in response thereto is controlled to alternately conduct and interrupt this current.
Some of the advantages of the fuse in accordance with the present invention are that the voltage of the supply voltage source, which may be common for several loads, is not noticeably charged for shortcircuiting in one or more of these loads, that injurious transients are avoided and that the current shock arising on coupling in a capacitive load is restricted. The fuse may furthermore be readily reset after it has been triggered.
BRIEF DESCRIPTION OF DRAWING
The invention will now be described in detail with reference to the attached drawing in which
FIG. 1 is a block diagram of an electronic fuse in accordance with the invention; and
FIG. 2 shows a portion thereof in detail.
BEST MODE FOR CARRYING OUT THE INVENTION
In the Figure there is shown a block diagram of an electronic fuse in accordance with the invention. A load LA, the current flow through which is to be monitored, is connected in a series circuit comprising a choke coil DR, a controllable switch OM and a current-sensing resistor R, and this series circuit is connected between the poles of a supply voltage source. The switch may comprise a power transistor and is adapted to be closed when a voltage corresponding to a logical One occurs at its control input.
The end of the resistor R facing towards the switch OM and a reference voltage V1 are respectively connected to a first and a second input of a sensing circuit AK. The latter is disposed for generating an output voltage responding to the difference between its input voltages, if the voltage at its first input exceeds the voltage at its second input. Otherwise the output is voltage zero. The resistor R and the reference voltage V1 are selected such that the voltage across the resistor is equal to V1 if the current through the load LA is equal to a predetermined value corresponding to the greatest acceptable load current. The circuit AK thus generates an output voltage which is zero if the load current falls below the predetermined value, and which responds to the difference between a greater load current and the predetermined value should a greater load current occur.
A control circuit denoted by SK has two inputs, of which the first is connected to the output of the sensing circuit AK and the second to the output of an OR gate E1. The control circuit is disposed to generate a voltage which increases when the voltage at its first input decreases and vice versa. The condition is, however, that it obtains a logic Zero on its second input. The voltage which is thus generated assumes a given maximum value for the input voltage zero and decreases t
REFERENCES:
patent: 4233557 (1980-11-01), Alberkrack
Ahl Ulf P. L.
Lundstrom Hans S. G.
Deboer Todd E.
Pellinen A. D.
Telefonaktiebolaget LM Ericsson
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