Electronic filter circuit with feed back loop

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Unwanted signal suppression

Reexamination Certificate

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Details

C327S103000

Reexamination Certificate

active

06661280

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an electronic filter circuit comprising a controllable transconductance.
A typical application area of such known filters is a Digital Access Arrangement (DAA) for modems. Such an application like some other applications requires on-chip filters which fulfil the conditions of an adjustable cut-off frequency, a low distortion, a small chip area, and a low current consumption. Filters are in such applications required for synthesizing a line-impedance for correct termination of the telephone line and as part of the trans hybrid for sidetone cancellation. Particularly in the latter case, low distortion figures are of prime importance while different country regulations or various telephone line conditions impose requirements with respect to tunability of the filter.
From literature an abundance of filter varieties is known. They can be categorized in time discrete and time continuous realizations. In spite of their accuracy a serious disadvantage of discrete time implementations, like switched capacitor and digital implementations like IIR and FIR structures, is the necessity of additional anti-aliasing filtering which has consequences for chip area.
Time continuous filters which feature frequency adjustability, inherently excluding opamp active filters since the cut-off frequency is fixed, usually suffer from non-linearities due to the applied voltage to current converter with variable transconductance.
BRIEF SUMMARY OF THE INVENTION
It is the object of the present invention to provide a solution overcoming the previously mentioned disadvantages while favourably realising a relatively easily manufacturable low pass on chip filter within the constraints of the earlier mentioned conditions.
According to the invention, such is favourably realized by an implementation according to the characterising portion of claim
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REFERENCES:
patent: 5726600 (1998-03-01), Raghavan et al.
patent: 5742199 (1998-04-01), Shoji et al.
patent: 6335655 (2002-01-01), Yamamoto
patent: 6404875 (2002-06-01), Malik et al.

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