Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2009-08-12
2011-11-15
Tran, Tan N (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257S098000, C257SE23179, C257SE21540, C257SE21122, C438S401000
Reexamination Certificate
active
08058737
ABSTRACT:
An electronic element wafer module is provided, in which a transparent support substrate is disposed facing a plurality of electronic elements formed on a wafer and a plurality of wafer-shaped optical elements are disposed on the transparent support substrate, where a groove is formed along a dicing line between the adjacent electronic elements, penetrating from the optical elements through the transparent support substrate, with a depth reaching a surface of the wafer or with a depth short of the surface of the wafer; and a light shielding material is applied on side surfaces and a bottom surface of the groove or is filled in the groove, and the light shielding material is applied or formed on a peripheral portion of a surface of the optical element, except for on a light opening in a center of the surface.
REFERENCES:
patent: 1967854 (2007-05-01), None
patent: 62-052503 (1987-03-01), None
patent: 2001-035972 (2001-02-01), None
patent: 2001-118865 (2001-04-01), None
patent: 2002-246613 (2002-08-01), None
patent: 2003-204053 (2003-07-01), None
patent: 2004-226872 (2004-08-01), None
patent: 2004-233482 (2004-08-01), None
patent: 2007-047779 (2007-02-01), None
patent: 2007-128979 (2007-05-01), None
patent: 2007-180653 (2007-07-01), None
patent: 2008-085195 (2008-04-01), None
patent: 2008-092417 (2008-04-01), None
patent: 2006/073085 (2006-07-01), None
Chinese Office Action and English language translation mailed Sep. 7, 2010 in corresponding Chinese Patent Application 200910166685.6.
Hasegawa Masahiro
Suetake Aiji
Conlin David G.
Edwards Angell Palmer & & Dodge LLP
Jensen Steven M.
Sharp Kabushiki Kaisha
Tran Tan N
LandOfFree
Electronic element wafer module and method for manufacturing... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic element wafer module and method for manufacturing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic element wafer module and method for manufacturing... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4271203