Electronic devices with composite atomic barrier film and...

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Reexamination Certificate

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C257S739000, C257S773000

Reexamination Certificate

active

06291876

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to the fabrication of electronic devices, and particularly to a novel barrier film for electronic and electro-optic materials.
Integrated circuits (ICs) are composed of many millions (sometimes billions) of components such as transistors, resistors, and capacitors. These individual components are laid out in a two dimensional array on a substrate such as silicon or gallium arsenide. The two dimensional arrays are often stacked one on top of another to form a three dimensional IC. As in any circuit, these components, and the several layers, must be connected to one another electrically. Interconnection on the two dimensional surfaces is accomplished by depositing strips of metal that act as connecting “wires.” Likewise, the layers are interconnected by metal plugs deposited in via holes made between layers. These steps in the manufacturing process are commonly referred to as “metallization.”
Generally, silicon is the substrate material of choice, aluminum is the metal of choice for two dimensional IC metallization, and tungsten is the metal of choice for filling via holes for multiple layer interconnection. Silicon is preferred because it is cheap and abundant. Aluminum and tungsten are chosen because they have adequate electrical conductivity and they can be made not to diffuse into the substrate during the many annealing operations inherent in the IC manufacturing process.
Because the electrical conductivity of aluminum and tungsten is limited, the “wires” and plugs must be made thick enough to ensure minimal resistance to electric current between components and between layers. The large size of these conductors has recently become an issue for IC designers and fabricators interested in placing a greater density of circuit elements on an IC. In order to achieve greater performance from ICs, the lateral dimensions of the circuit elements must be reduced. This reduction in IC element size has two detrimental effects on the resulting IC. First, it increases the resistance of the metal interconnects. Second, it increases the aspect ratio of the via holes, making them more difficult to fill with the metallic material. Incomplete filling of the via holes exacerbates the problem of high resistance. Today, there is often not enough space in the lateral direction on an IC chip to accommodate large aluminum conductors. Additionally, the size of the via holes, when filled with tungsten, limits the number of levels in the IC to no more than five.
Copper, which is a much better conductor of electricity than aluminum, is available as an alternative metallization material. Because of copper's greater electrical conductivity, copper imposes less resistance to the flow of electrons than aluminum or tungsten conductors having equivalent dimensions. The increasing density of components on today's ICs requires the smaller sized conductors that are only achievable by the use of highly conductive metallization materials.
Unfortunately, copper has one notable problem. It has a tendency to diffuse into silicon at elevated temperatures. This has precluded copper as a metallization candidate because ICs must be annealed several times during the manufacturing process. In order for copper metallization to be feasible, a technique must be developed that will prevent the diffusion of copper into silicon. Among the possible solutions currently under development within the semiconductor industry the most prevalent is the use of nitrides of the transition metals titanium and tungsten. The thickness of the metal-nitride layer required to stop copper diffusion into silicon effectively is in the range of tens to hundreds of nanometers, or hundreds to thousands of Angstroms (Å).
The problem of diffusion exists not only in the case of copper metallization on silicon, but also in the case of copper metallization on other single- and polycrystalline semiconductor substrate materials such as gallium arsenide, silicon carbide, germanium, and so forth. Copper diffusion into insulating materials such as SiO
2
can also result in short circuits, especially in dense arrays of IC components. Diffusion is also a problem with other high conductivity metallization materials such as gold, silver, and platinum.
An object of this invention is to provide a barrier film which is extremely thin, yet permits metallization using copper and other high conductivity metallic conductors which would otherwise have a tendency to diffuse into a substrate formed of a semiconducting or insulating material.
It is also an object of the invention to improve electronic and electro-optic devices by making it possible to achieve one or more of the following desirable characteristics: increased component density in large scale integration, reduced heat dissipation, increased speed of operation, and a decreased number of layers.
Still another object is to provide a procedure for forming an extremely thin diffusion barrier, which produces consistent results rapidly and reliably, and which is not highly dependent upon the accurate maintenance of operating conditions such as time and temperature.
Still another object is to provide a process for forming an extremely thin diffusion barrier which eliminates voids and mechanical stresses that can have detrimental effects on the substrate, the diffusion barrier, or the metallization layer.
SUMMARY OF THE INVENTION
In accordance with this invention, a semiconductor device is fabricated by forming, on a surface of a substrate material, a barrier film having a monolayer of metal atoms immediately adjacent the surface of the substrate material. In one aspect, a metallic conductor, which has a tendency to diffuse into the substrate material, is then deposited onto the barrier film. Metallic conductors which have a tendency to diffuse into substrates of semiconductor or insulating materials include, for example, pure copper, copper alloys (e.g., Cu—Al, Cu—Si—Al), copper doped with a dopant (e.g., aluminum) that impedes electromigration, gold, silver, or platinum. For purposes of this invention, a “monolayer” is understood to refer to a two-dimensional array of atoms having the thickness of one atomic layer; although the monolayer may have minuscule defects such as minute portions with a thickness that exceeds one atomic layer and/or minute portions that are voids, the average thickness nonetheless essentially is an atomic layer providing essentially complete coverage of the directly underlying substrate surface regions. The monolayer, which is extremely thin by definition, serves as a barrier film, inhibiting diffusion of the metallic conductor into the substrate material. For purposes of this application, the material upon which the monolayer of atoms is formed is often generally referred to herein as a “substrate” for such formation, and it will be appreciated that the term “substrate” as used herein can encompass a bulk wafer or, alternatively, a layer that is grown, deposited, formed or bonded upon another body. The present invention is especially concerned with substrates that are semiconductor or insulating materials.
In one preferred method of this invention, a monolayer is produced by depositing a metal halide upon a surface of a semiconducting or insulating substrate material where it first reacts with the substrate material and dissociates, releasing gaseous by-products formed of substrate atoms and halogen atoms of the precursor compound. This reaction is self-limiting resulting in formation of a monolayer of metal atoms on the substrate that thereafter enables a homoepitaxial film formed of the metal halide molecules to form thereon as the deposition process proceeds. This deposition operation can be carried out by various methods, but is preferably carried out by molecular beam epitaxy, or alternatively by r.f. sputtering. At this juncture, a temporary heteroepitaxial film has been formed on the substrate where the diffusion barrier is ultimately desired. Then, in a second stage of the procedure, the temporary heteroepitaxi

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